Clock divider circuit for sc input on the cxa2075m

Clock divider circuit for sc input on the cxa2075m
by on (#108563)
I tried to message Drakon about this, but no response yet.
Tiido and Drakon came up with a way to divide the 21.47 MHz clock to 3.58MHz for use as the SC input on the cxa2075m encoder, but I can't get it to function properly.
So I got a 3.58 MHz oscillator and got it working, but the point of the divider is to reduce jailbars in the svideo/composite output. Although I didn't actually see any on my pvm, but maybe they will show up more on the lcd tv?
I also put the 2.2kOhm and 47pF component in the signal path as per the cxa datasheet to help with high-freq interference, but it didn't help, nor did it seem to anything with the oscillator.
There's a similar set for the sync signal, but it also seems to do nothing.
I don't have a DSO to tell me that the signal in the diver circuit is at the correct cycles, but my analog scope shows a similar waveform as the oscillator.
Here is the circuit Drakon posted, but quickly removed from some thread he posted it in, not sure how I found it, not sure why he removed it... well maybe a little sure... ;)
Image
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108567)
Tie up all the unused inputs.
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108748)
I can draw crudely too!

Something like this should work too:
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108749)
yxkalle wrote:
I can draw crudely too!

The image doesn't work (the host probably checks for HTTP refer(r)er). Even if it did, you (and everybody else) would be better off using the attachment feature of this forum so we can enjoy the crude drawings even when the host stops working.
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108750)
thefox wrote:
The image doesn't work (the host probably checks for HTTP refer(r)er). Even if it did, you (and everybody else) would be better off using the attachment feature of this forum so we can enjoy the crude drawings even when the host stops working.

Thanks. :wink:
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108783)
TmEE wrote:
Tie up all the unused inputs.

I assume you mean pull them high? That didn't help...
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108785)
yxkalle wrote:
I can draw crudely too!

Something like this should work too:

Thanks! Will give it a go!
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108801)
yxkalle wrote:
I can draw crudely too!
Image
Something like this should work too:

Just tested with 74LS175, neat divider by 6.
Re: Clock divider circuit for sc input on the cxa2075m
by on (#108805)
Just a simple twisted ring counter, also known as a Johnson counter. By inverting the output of the last flip-flop and feeding it into the first you get a 6 state sequence like this:
000
100
110
111
011
001
and then 000 again.

But what happens if the power-on state on the flip-flops is 101 or 010?
You could (and probably should) tie "Clear" on the 74175 to some active-low reset line (CPU pin 3?) or maybe a simple power-on reset circuit with a capacitor tied from clear to ground and a resistor from +5V to clear. Like this:
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HD74HC175_2.png
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