It's a known fact that battery backup saves are prone to accidental corruption or erase of the chip.
I think there is 3 ways the SRAM could be somehow affected negatively :
1) The power switching circuit is faulty when switching from battery to power supply or battery from power supply
2) The chip is enabled and accidentally written to while the power is turned off, as the processor might go crazy during this time.
3) The battery is dead / delivers insufficient voltage to retain data.
There is no workarround for 3, but 1) can be easily fixed with a large-sized capactity on the SRAM line, making it go to slow transitions from normal voltage and battery voltage. Old boards such as NES-SNROM-03 does lack this capacity, resulting in frequent saves loss, but NES-SNROM-05 added it and I think it's much more reliable.
Then there is problem 2). Nintendo didn't bother to fix is, and ask the user to press reset when turning the power off as a workarround for that (since the CPU will be resetted, it won't go crazy and write to SRAM when being shutting down).
However it's not easy to ALWAYS press reset when turning the power off, especially if you use a fronloader with a bad connector and that require you to turn the console on and off a few times before you get the game working.
I think Nintendo are very lazy because this could have easily been fixed with a simple analog circuit (that is the point of my post) :
Use a zenner diode for a stable voltage reference (for example 3.3 V), this voltage will be constant for small variations of VCC.
Then use a resistor divider for another voltage reference slightly higher than the other (for example 3.5 V), but this time this reference will be directly proportional to VCC.
Finally use a voltage comparator, and if the second reference is lower than the first, this means the voltage is dropping and that the SRAM must be disabled (this also works when enabling the power by the way). Since 8k SRAM chips have two enables, it's easy to tie one enable to the comparator and the other to actual logic.
So with a couple of common electric parts would easily solve this problem and greatly improve saving reliability. But no, Nindendo didn't do that. What cheap ass they are.
I think modern MMCs such as MMC5 and MMC6 might have a similar circuit internally, but the MMC1 and 3 definintely dont.
I think there is 3 ways the SRAM could be somehow affected negatively :
1) The power switching circuit is faulty when switching from battery to power supply or battery from power supply
2) The chip is enabled and accidentally written to while the power is turned off, as the processor might go crazy during this time.
3) The battery is dead / delivers insufficient voltage to retain data.
There is no workarround for 3, but 1) can be easily fixed with a large-sized capactity on the SRAM line, making it go to slow transitions from normal voltage and battery voltage. Old boards such as NES-SNROM-03 does lack this capacity, resulting in frequent saves loss, but NES-SNROM-05 added it and I think it's much more reliable.
Then there is problem 2). Nintendo didn't bother to fix is, and ask the user to press reset when turning the power off as a workarround for that (since the CPU will be resetted, it won't go crazy and write to SRAM when being shutting down).
However it's not easy to ALWAYS press reset when turning the power off, especially if you use a fronloader with a bad connector and that require you to turn the console on and off a few times before you get the game working.
I think Nintendo are very lazy because this could have easily been fixed with a simple analog circuit (that is the point of my post) :
Use a zenner diode for a stable voltage reference (for example 3.3 V), this voltage will be constant for small variations of VCC.
Then use a resistor divider for another voltage reference slightly higher than the other (for example 3.5 V), but this time this reference will be directly proportional to VCC.
Finally use a voltage comparator, and if the second reference is lower than the first, this means the voltage is dropping and that the SRAM must be disabled (this also works when enabling the power by the way). Since 8k SRAM chips have two enables, it's easy to tie one enable to the comparator and the other to actual logic.
So with a couple of common electric parts would easily solve this problem and greatly improve saving reliability. But no, Nindendo didn't do that. What cheap ass they are.
I think modern MMCs such as MMC5 and MMC6 might have a similar circuit internally, but the MMC1 and 3 definintely dont.