I have an MMC1 cart with CHRRAM and I want to use it for a game with save slots.
Would the save slots be in the same address range as the CHRRAM? If so then I'd just hook up the battery to RAM VCC using
this topicas a reference.
If I'm on the right track, then what range of voltage should be at CHRRAM VCC to make it nonvolatile (/what kind of zeners should I use)?
And last thing, do all the MMC1's use the same size of CHRRAM?
Thanks
All known MMC1 carts from the NES's commercial era use either CHR ROM or 8192-byte CHR RAM. The only known larger CHR RAM on the NES (excluding Japan-exclusive Famicom games) is Videomation, and that uses CPROM (a variant of CNROM with a fixed bank).
The battery-backed chip is sometimes called "WRAM" and sometimes "PRG RAM", but it's a separate chip, usually on the other half of the board. Look at photos of SNROM (MMC1 + CHR RAM + PRG RAM) boards:
The Legend of Zelda with battery,
Metroid without battery. CHR RAM is at lower left, and PRG RAM is at upper right.
Fun fact: One of the programmers of Videomation later went on to work on Genesis Action 52.
Sweet thanks.
Then I'm thinking of converting my SGROM (PRGROM+CHRRAM) to an SNROM. So what I'd have to do is have address decoding to assign the NV WRAM addresses $6000-7FFF (8 kb). Hopefully it wouldn't be any more complicated than that. The SG has a 6113B1 and MMC1B2. Can I use the address decoding from these other two chips on the board? And still out of curiosity what's the address range of the CHR RAMs?
I could probably salvage a CHR RAM from another SGROM and use it for the WRAM. What size are the CHR RAMs on UNROM boards?
I successfully added a battery to a Metroid MMC1 board (had to also add a couple of diodes and a resistor).
I also converted an Ultima MMC1 board to battery-back the CHR RAM, and also replaced the ROM with 32K RAM and battery-backed that (needed to add a transistor to ensure that /CS for the 32K RAM went high on power-down, otherwise it didn't go into retention mode and drained lots of power).
Does a SGROM board even have pads for WRAM? As for decoding, there's no way it can't, since the MMC1 must already have /CART, PRG A14, and PRG A13 connected so it can decode the MMC1 register addresses. Those are enough (and M2, which is also connected) to generate the CE for WRAM.
CHR RAM is usually mapped to PPU $0000-$1FFF. It's 8K, just like WRAM, so you can use it directly. Note that battery-backed WRAM is usually lower-power versions of SRAM (often LL in the part number). But with the Ultima mentioned above, I didn't have any problem with the normal SRAMs. They are listed as using 50 uA max during retention, but I've had them work fine with about 1.5 uA for all three SRAM chips (PRG RAM, WRAM, and CHR RAM). Recently I ran an overnight test where I filled each with a random pattern, powered off for about 12 hours, then verified that there was no corruption. I reduced the current by swapping the 1K current limit resistor from the lithium with a 470K resistor. Be sure you measure retention current after you're done, to be sure you've got all the SRAM chips in retention mode, and so you won't drain the battery. You can do this by connecting the current meter across the 470K resistor, or measuring the voltage drop across the resistor.
blargg wrote:
Does a SGROM board even have pads for WRAM? As for decoding, there's no way it can't, since the MMC1 must already have /CART, PRG A14, and PRG A13 connected so it can decode the MMC1 register addresses. Those are enough (and M2, which is also connected) to generate the CE for WRAM.
The MMC1B2 is in the spot where the WRAM would be so it would take a little work for the conversion. Thanks for sharing all your experience, I'll put it (along with this
reference) to good use.