A french NES dumping group by the name of
ENES have developed a new dumper by the name of
Spaghetto 2.
It seems that there is no real technical information on the dumper other than the pictures provided. Obviously, it's a hardware-based dumper without the need of a 2A03. I wonder how effective it is...
Comments?
If this device is effective at reading and writing the PRG bus and the CHR bus, and it becomes widely available, then this means 1. use of emulators would become more surely legal, as people would be able to dump their own Game Paks rather than downloading copies off the net, and 2. flash cards would become easier to design, as they wouldn't need to contain PC interface logic.
Do you guys know of the Pasofami emulator? It has support for a DIY interface, the hardware paired with the emulator is capable of dumping nearly any game, with little to no hardware reworking (and this includes Japanese MMCs of course.)
Did you see the size of that thing? It's huge! I couldn't make out what type of chips those are, but it's clearly a DB25 parallel adapter on the back. Making a rom dumper using a parallel cable and a couple of latches is really easy, and not new at all.
merp wrote:
A french NES dumping group by the name of
ENES have developed a new dumper by the name of
Spaghetto 2.
It seems that there is no real technical information on the dumper other than the pictures provided. Obviously, it's a hardware-based dumper without the need of a 2A03. I wonder how effective it is...
Comments?
There is no technical informations for now ... no. The dumper needs to be improved but is working. We are breaking the head on Maniac Mansion cart which has a particular structure (no CHR rom).
Hello (again),
actually the problem is still here but we changed a bit our mind. We will release plans and software to use the dumper. Documentation will be provided to develop your own memory chip manager.
Just 2 days to wait before we put that online
I really can't see what's wrong, Maniac Mansion is SNROM, like Zelda. Because there is no CHRROM, you don't need to dump it. I really can't see where there would be a problem, scince lot of SNROM games has been dumped...
Bregalad wrote:
I really can't see what's wrong, Maniac Mansion is SNROM, like Zelda. Because there is no CHRROM, you don't need to dump it. I really can't see where there would be a problem, scince lot of SNROM games has been dumped...
The problem is that we don't find the problem too : we sucessfully dumped the US cartridge.
(F) and (G) too but data are messed up. Is there any knwow difference between PAL and NTSC games ?
Maybe (F) and (G) aren't SNROM, open the cartridge and verify it.
Bregalad wrote:
Maybe (F) and (G) aren't SNROM, open the cartridge and verify it.
Actually it is. The memory chip is MMC1B3
And the cart :
Well, so I can't really see what's wrong, if you succeded at dumping PRG of other MMC1 games. Maybe contacts aren't clean enough... ?
The MMC1 isn't a memory chip, but a discrete logic chip (or am I saying wrong ?)
Edit : Wait. MMC1B3... I only remember that MMC1B1 and MMC1B2 exists... The only difference between various MMC1 versions would be the SRAM enabling/disabling or something.... Maybe it's a trick with D5 of MMC1 reg 3 ? More info would be welcome.
Thats awesome, cant wait till ya release the schematic's to make my own =) Keep up the good work
if you already have the cart open if I am not mistaken wouldn’t a low tec solution would be to dump the roms directly using a EPROM programmer all you would have to do is solder wires to the back of the roms mach up the pinout to a equivalent programmable rom stick the wires in the appropriate slots in the programmers socket and hit read chip if you don’t want to solder to the cart the pins sticking out the back of the carts board are long enoth to attach a socket to you can solder to that (you would have to use zif sockets to get a good enoth connection sence a regular one would not clamp down on the pins)
a bit of a hassle if you want to do a lot but for one cart if would seem like the simplest way
then to get it emulator playable assumeing there is chr rom you just use the "copy /b prgrom.bin+chrom.bin combinedfile.bin" command to combine the files then open it in a hex editor add 16 bites to the beginning and type in the apprpreate mapper information then your done
Hello ^^
a bit late (we had some web domain trouble) but now the new website is open.
All the dumper schematics are here :
http://sourceforge.net/projects/enes/
Documentation : schematics of the dumper
Carbonara : dumper software
Libspaghetto : dumper driver (included in Carbonara too)
It would be easier to unsold the roms but we cannot do that : some are lended carts so we can't deteriorate them. The only thing we do to the cart is opening it to look for chip infos.
However I don't have infos on the MMC1B3, it is not very well documented.
The Jedi wrote:
However I don't have infos on the MMC1B3, it is not very well documented.
An MMC1B3 behaves exactly the same as any other MMC1, and the MMC1 is very well
documented.
Quietust wrote:
The Jedi wrote:
However I don't have infos on the MMC1B3, it is not very well documented.
An MMC1B3 behaves exactly the same as any other MMC1, and the MMC1 is very well
documented.
Well, it is documented to emulate the cart and to know how it is composed BUT it does not explain the hardware stuff.
In fact, it is "easy" to read a MMC chip but it is hard to know how to change register and bank. As THIS is documented for all xNROM, it is not for MMC.
However, we succeeded in understanding how the MMC1B2 works (at least this one, not tested with other revision but it should work fine too, on MMC1x) ! We manage access to the CHR, PRG and the damn timer.
To bankswitch the PRG and CHR on a cart containing an MMC3, you make a series of writes to $8000 and $8001. Is there anything in
Kevin Horton's MMC3 doc that you don't understand?
tepples wrote:
To bankswitch the PRG and CHR on a cart containing an MMC3, you make a series of writes to $8000 and $8001. Is there anything in
Kevin Horton's MMC3 doc that you don't understand?
Maybe, we did not try MMC3 for now.
For the MMC1, there is also the timer sent by the NES CPU which makes it harder : you have to read/write and select on which bank you need to go in a certain manner. In fact, the read/write is buffered somewhere ONLY on the ascending movement from the timer. That is the difficulty.
The thing you have to understand is that Spaghetto do not come onto the NES like CopyNES does, it "talks" with the cartridge so we have to learn how to speak with the cart. We know how to read a cart, we know how to change bank but it is how the switch is handled we don't know (at least for MMC1 we do know now).
Timer ? What are you talking about ? You mean buffer, I presume ? Yeah, MMC1 writes are buffered, so you have to reset the chip by writing something with bit 7 to 1 logic state to it, then it's buffering will be reseted.
Then, each 5 writes, the buffer will be full of 5 logic states, and 5-bit data will be sent to the corresponding MMC1 register (in function of the last write only), and at this point the MMC1 buffer is automatically reseted, so the next write (the sixth one) will begin a new value again, and again, etc...
Maybe spagettho 2 doesn't hold MMC1 reset signals correcly ?
You don't know how the switch is handled.... you mean how the MMC1 bankswitches banks ? It toggles the A14-A17 lines automatically for PRG, and CHR banking is a bit more complex, I think you should setup the MMC1 in 8kb CHR banking mode, and dump only odd numbered banks. I have no knowledge about how works a dumping machine, but I can imagine it pretty much. The output lines will swap only after the 5th write... I really can't see much what is your problem, tough...
I think the "timer" may refer to the clock on the Phi2 and PRG /CE signals.
Bregalad wrote:
Timer ? What are you talking about ? You mean buffer, I presume ? Yeah, MMC1 writes are buffered, so you have to reset the chip by writing something with bit 7 to 1 logic state to it, then it's buffering will be reseted.
Then, each 5 writes, the buffer will be full of 5 logic states, and 5-bit data will be sent to the corresponding MMC1 register (in function of the last write only), and at this point the MMC1 buffer is automatically reseted, so the next write (the sixth one) will begin a new value again, and again, etc...
Maybe spagettho 2 doesn't hold MMC1 reset signals correcly ?
You don't know how the switch is handled.... you mean how the MMC1 bankswitches banks ? It toggles the A14-A17 lines automatically for PRG, and CHR banking is a bit more complex, I think you should setup the MMC1 in 8kb CHR banking mode, and dump only odd numbered banks. I have no knowledge about how works a dumping machine, but I can imagine it pretty much. The output lines will swap only after the 5th write... I really can't see much what is your problem, tough...
Yep, that is just what we found this week-end.