To my undestanding, this signal is the 1.79 MHz clock used by the CPU. Is that right ? Why is it labelled as weirdly and unmeaningully as this ?
And, why /A15 is ANDed with M2 to enable the PRGROM chip ? That would result in disabling and enabling the chip very fastly (once per PRG cycle). This is stupid, why isn't just /A15 put on the Chip Enable inputs ?
Phi2 (Φ2) is the 2nd-phase of the 1.79Mhz clock (Φ1). This phase is used inside the CPU for memory accesses. It's on the cart connector because when this is high, the cart can know when it needs to output onto the data bus.
/CE is !(phi2 & A15) because when a15 ($8000-FFFF) is 1 and Phi2 is 1 (memory access), that's the only safe time for the ROM to output. CE is active low because OE is usually active low; they did this so carts didn't need any logic.
Phi2 is supplied by itself so that games can decode stuff to $0000-7FFF by using /CE = 0, Phi2 = 1 (which means A15 is low)
Okay, then what is the difference between the CPU clock and phi2 signal ? You mean that Phi2 goes high only after the CPU has stable value on adress bus, so it'd be just a dephased version of the CPU clock ?
And why couldn't the ouptout of the ROM be enabled when phi2 is low ? There is no other device that would acess the bus aside of the CPU itself, wich just wouldn't read the data at this exact time anyway. I don't think /CE have to be high each time the adress changes, or is it just to prevent fast transision glitches ?
Best place to look for the info is the datasheet timing diagrams. I have the Rockwell "R6500 Microprocessors" datasheet and it shows the clock in relation to the memory read/write cycles.
It's just the safe way to do it. You really need the address lines in a known state. If it's in that unknown state between 1 and 0 it could use a lot of current, at worst maybe enough to fry a chip.
i busted open a SMB w/ duck hunt cart the other day, and it doesnt even have a pin for phi2.
dont know what it means, just thought id throw that out there.
I think the phi2 line is needed only to decode A15, because you only get A15&phi2 on the connector. Most discrete logic mappers just doesn't decode A15 (since they do nothing with $4100-$7fff).