As far as I know, the standard CHR ROM hookup is:
PPU A13 -> CHR ROM /CE
PPU /RD -> CHR ROM /OE
Or, when a CHR ROM has only one /CE:
(PPU A13 + PPU /RD) -> CHR ROM /CE
As outlined in this thread:
http://www.famicomworld.com/forum/index ... pic=8671.0, some carts made for clones connect the following:
PPU A13 -> CHR ROM /CE
GND -> CHR ROM /OE
These carts work correctly on clones, but show graphical glitches on the real deal. Why is this?
The official NES doesn't have enough pins on the PPU, and so they multiplex the data bus with the lower half of the address bus. An additional IC (a 74'373) is responsible for latching the address bus.
If another device is driving the bus at the same time, the value latched will be the logical AND (a normal NMOS bus conflict) of the two values driven, causing errors in rendering. (Actually, it's a little worse than that: the CHR ROM's A7..A0 are connected to its own D7..D0 through the 74'373, so there's a feedback path as well as the AND effect)
The later clones aren't constrained by package choice (they're almost all epoxy blobs) and so integrating the functionality of the 74'373 is an obvious decision. At this point, since multiplexing is no longer needed, cartridges are free to assume that if the CHRROM is being addressed (PPU A13 low), there's nothing else that needs access to the data bus.
These carts can also be modified by, IIRC, pulling CHR OE from the CHR-RAM and running a line to CHR A17. I own one of these carts and the A17 pin was damaged, so I put it into an NES cart with a NES-JOINT-01 and soldered right into the A17 VIA on the NES-JOINT-01. It works like a charm.
Ya gotta be careful though. Mine was actually different from the pictured ones. It has the CHR-RAM on the BACK of the PCB and the PRG on the front of it. So I had to Google up a datasheet for the CHR-RAM part and find OE.