To explicitly state the DPCM glitch detection tepples is talking about, he means for one of the shift registers, have the final IC's SERIAL IN and last bit (A or PI-1) be connected to Vcc and Gnd (or vice versa).
This way, if there was a glitch, the 16th read won't report 0 (if PI-1 was Vcc) but instead 1. Reduces your total inputs to 47 instead of 48, but since the synth in your video only has 37 keys in the keyboard, that's probably an acceptable trade-off.
Also, I tried writing up a "how to build your own Four Score seeming controller" here:
http://wiki.nesdev.com/w/index.php/Four_Score . Is it clear enough?