2 KB CHR bankswitching inconsistency?

This is an archive of a topic from NESdev BBS, taken in mid-October 2019 before a server upgrade.
View original topic
2 KB CHR bankswitching inconsistency?
by on (#110320)
Hi all,

I started my own emulator project, Yane (http://yane.alike.se), in October 2012 with the goal to play SMB1. I thought it was a fun thing to do while being on parental leave. SMB1 has been playable for some time now and I am now adding more mappers.

This is the first post on the NESDev forums, but I have been following the NESDev forums for a while. I have never had to ask a question, since they have all been asked before. Until now. I was recently done (more or less) with MMC3 (#4). But it toke time, since the 2 KB CHR bankswitching never worked. Today I discovered that if I treated the bank index argument (from $8001) as 1 KB indices when doing a 2 KB bankswitch everything worked well. Why is that? Is the documentation of MMC3 (http://wiki.nesdev.com/w/index.php/MMC3) missing something? Or is the 2 KB CHR bankswitching in general just inconsistent?

When I read the ROM file I store CHR in 1 KB banks and a simple mapping scheme is used to map RAM access to the correct 1 KB bank from the ROM file. For all other CHR bankswitching I have to translate the bank index argument to 1 KB banks in the ROM, e.g. bank_index * 4, when doing a 4 KB CHR bankswitch. As I said, with 2 KB CHR bankswitching everything gets messed up if that translation is done.

Anyways, thanks for all the help and awsome test ROMs.

Yours sincerely,
Robin
Re: 2 KB CHR bankswitching inconsistency?
by on (#110321)
In the MMC3 writeup, we failed to make overly clear that the 2KB mode discards the LSB. I'll fix thatTepples fixed that.
Re: 2 KB CHR bankswitching inconsistency?
by on (#110326)
Thanks for the quick reply! And, that explains why my MMC3 rendered garbage once in a while :) It all looks fine now.