How to detect MMC1 Revisions?

This is an archive of a topic from NESdev BBS, taken in mid-October 2019 before a server upgrade.
View original topic
How to detect MMC1 Revisions?
by on (#105325)
The simplest approach I suppose would be change based on CRC and then just have a database. Whats the standard method here?
Re: How to detect MMC1 Revisions?
by on (#105327)
MMC1A is mapper 155. MMC1B and MMC1C are mapper 1.
Re: How to detect MMC1 Revisions?
by on (#105329)
What about plain MMC1? But I have a test ROM that detects the banks work, then provides start up info and WRAM info. It's on the forums here a few times, should be easy to find.
Re: How to detect MMC1 Revisions?
by on (#105331)
Correct me if I'm wrong, but I think MMC1 and MMC1A behave the same: no PRG RAM disable bit. MMC1B has a PRG RAM disable bit but boots in an unpredictable state; MMC1C always boots in disabled state. Only two games actually rely on pre-B behavior, unlike the MMC3 where it appears no games rely on "old" IRQ behavior.
Re: How to detect MMC1 Revisions?
by on (#105334)
In my testing with my MMC1B2 cart, it always boots in the last bank. I think A and no revision boot in a random state? I know the no revision isn't supposed to. I dunno, I wish somebody who had the ability to quickly test each MMC1 could with my ROM. I can, I just need to socket the MMC1 and desolder a few from a couple donors. I think my kid icarus has a normal MMC1. I have a ton of games, so I should be able find an A and C somewhere.
Re: How to detect MMC1 Revisions?
by on (#105335)
tepples wrote:
Correct me if I'm wrong, but I think MMC1 and MMC1A behave the same: no PRG RAM disable bit. MMC1B has a PRG RAM disable bit but boots in an unpredictable state; MMC1C always boots in disabled state. Only two games actually rely on pre-B behavior, unlike the MMC3 where it appears no games rely on "old" IRQ behavior.


Which two games?
Re: How to detect MMC1 Revisions?
by on (#105340)
tepples wrote:
Correct me if I'm wrong, but I think MMC1 and MMC1A behave the same: no PRG RAM disable bit. MMC1B has a PRG RAM disable bit but boots in an unpredictable state; MMC1C always boots in disabled state. Only two games actually rely on pre-B behavior, unlike the MMC3 where it appears no games rely on "old" IRQ behavior.


I believe your correct except for some boards (SNROM) that create a WRAM disable bit with an unused CHR address bit. More of a board behavior than a MMC1 behavior, but it's a behavior that the ROM is subjected to none the less.
Re: How to detect MMC1 Revisions?
by on (#105344)
Zelex wrote:
Which two games?

tepples wrote:
MMC1A is mapper 155.

The two games believed to require mapper 155 behavior are listed on that page.