tepples wrote:
Correct me if I'm wrong, but I think MMC1 and MMC1A behave the same: no PRG RAM disable bit. MMC1B has a PRG RAM disable bit but boots in an unpredictable state; MMC1C always boots in disabled state. Only two games actually rely on pre-B behavior, unlike the MMC3 where it appears no games rely on "old" IRQ behavior.
I believe your correct except for some boards (SNROM) that create a WRAM disable bit with an unused CHR address bit. More of a board behavior than a MMC1 behavior, but it's a behavior that the ROM is subjected to none the less.