Sorry if this seems like a trivial question but I am a beginner and I have had a difficult time finding an in depth explanation about page crossing.
I know in certain opcodes we have to take into consideration of an extra cycle whenever there is "page crossing" but what is it exactly?
Does page crossing just mean when only the resulting high byte of an address is different from the previous (i.e. changed)? Let's say a random example of $1E FF to $1F 00? If this is the case, would the algorithm be something like this:
Code:
Interpret addressing mode
do operation
determine which status bits need to be updated
increment pc counter
increment cycle counter
if page crossed then cycle counter = cycle counter + 1
Thanks all.
LDA $280,X
If X=$7F or lower, It'll load from $2FF or lower, no page crossed.
If X=$80 and above, it'll load from $300 and above, page has been crossed.
Sorry 3gengames, not sure what you mean by this answer but this confirms what I am thinking?
"Page crossing" occurs when the Program Accumulator (PC) changes its high byte. You see "high byte" as "value >> 8", or the 8 MSB of such value. Example, old PC = $8F9C, new PC = $909C, we have page crossing.
If the PC is $80F0 and X is $50 and you add the two together;
$F0 + $50 = $0140 i.e. it is too big to fit into a byte.
So the $80 becomes $81 to make $8140. Therefore a page was crossed. This only ever works upwards, there is never a time when the $80 would become $79.
Edit: Because the 6502 must read or write on every cycle the CPU performs an extra (dummy) read on a location whilst it adds one to the high byte. Google 6502_cpu.txt for precise info.
I think some posts here are confusing. There are two kinds of instructions that can result in page crossing: When indexing an absolute or indirect address to find a final address - which does not use the PC, and when branching, which does use the PC and uses signed values.
Does the OP understand it now?
Of course there is also the page crossing that occurs when incrementing an address at the end of a page, like an LDA #0 with the opcode at $80FF and the $00 at $8100. This doesn't cause extra cycles since there is extra hardware to make this always take only a single cycle.
blargg wrote:
Of course there is also the page crossing that occurs when incrementing an address at the end of a page, like an LDA #0 with the opcode at $80FF and the $00 at $8100. This doesn't cause extra cycles since there is extra hardware to make this always take only a single cycle.
I assume that's because the PC acts as a 16-bit incrementable register, so it can be incremented in one cycle, as well as being loaded from both an internal latch and the 8 bit adder output and from other internal sources. Because the adder itself is only 8 bits, it takes two cycles to make an internal 16 bit addition and hardware detects and optimises cases when only the low part of the result (that is the effective address) is updated. Note that for operation when it would otherwise possibly write to a bad memory location (like with indexed STAs) the extra cycle is always here, so it never corrupt memory.
Also, nice to see you again here, blargg
