As Zepper told me im running PPU/APU before CPU to keep nmi sync when i executing ppu when cpu before cpu read and before it writes. Anyway blarrg's nmi test throw me error #8.
But im not concernd about that now. The thing is that it's a storm of cpu errors. Unknow errors in cpu timing v6 and zero page error in instr_timmming v3.
I just want to know the difference between a cpu "fetch" and a cpu "read". Since i read that in 6502_cpu.txt in each cycle.
Maybe that could help me in my way.
Anyway im very lost with this new implementation.
Any help would be appreciated
But im not concernd about that now. The thing is that it's a storm of cpu errors. Unknow errors in cpu timing v6 and zero page error in instr_timmming v3.
I just want to know the difference between a cpu "fetch" and a cpu "read". Since i read that in 6502_cpu.txt in each cycle.
Maybe that could help me in my way.
Anyway im very lost with this new implementation.
Any help would be appreciated