Question about page crossing instructions

Question about page crossing instructions
by beannaich on 2011-08-26 (#83151)

I have been trying to figure out an implicit, reliable, and smart way to check for page crossing when executing certain addressing modes. I came up with the following for Indirect,Y..

Code:

if (code != 0x91 && (code & 0x1F) == 0x11) {
    // Check for page boundary on Indirect,Y addressing mode
}

It's reliable, but explicit and could cause unnecessary slow-downs having to check each instruction that uses Indirect,Y (Albeit, not many do).

I started researching this more, and came up with an assumption that I would like verified or proven wrong. My assumption based on research is that only instructions that read and ONLY read an effective address add cycles for page crossing. Read-modify-write instructions don't seem to check for page boundaries, and neither do instructions that only write to the effective address. For example:

ADC
AND
CMP
EOR
LDA
LDX
LDY
ORA
SBC

Those instructions never modify any data in RAM, they only modify internal registers. They also check page boundaries.. Is my assumption correct, or is there a better explanation?

by Dwedit on 2011-08-26 (#83155)

Yep, looks like it's only Store and Read-Modify-Write instructions that don't take extra cycles when the page crosses after adding Y or X to an absolute or indirect address.

I think the read instructions can get away with a dummy read on an uncorrected address, and replace it with a real read for when it needs to correct the page. But the write instruction always has to wait, so it waits that extra cycle to make sure it has a corrected address.
I guess the read-modify-write instructions are just designed to always wait 1 cycle to correct the address after the dummy read.

by beannaich on 2011-08-26 (#83156)

Dwedit wrote:
I think the read instructions can get away with a dummy read on an uncorrected address, and replace it with a real read for when it needs to correct the page.

Unless that dummy read happens on $2002, $2007, $4015, $4016, $4017 or some other important register that changes on reads!

Also, why do R-M-W instructions not add cycles for a messed up address? You'd think since it's reading, it would follow the same logic as the read-only instructions.

Now the only question is how do I get my emulator to tell the difference between R-M-W and Store instructions and read-only instructions..

Edit: engrish

by cpow on 2011-08-26 (#83161)

beannaich wrote:
Now the only question is how do I get my emulator to tell the difference between R-M-W and Store instructions and read-only instructions..

Edit: engrish

Maybe I need an engrish lethon, but isn't the answer "the opcode, silly"?

I'll take my prize money in large bills. Thanks.

by beannaich on 2011-08-26 (#83162)

See, that's too explicit for what I want, and it's how I am currently handling it. I have a 256 entry look up table with all the addressing modes in it, and the ones that check page call a special method instead ("AbY_C" instead of "AbY", etc). But I would much rather have an implicit method I'm just weird that way.

Also, I can't get to the NESICIDE homepage, and I really want to dl it and play around! Is there a different page I can get it at?

by cpow on 2011-08-26 (#83163)

beannaich wrote:
See, that's too explicit for what I want, and it's how I am currently handling it. I have a 256 entry look up table with all the addressing modes in it, and the ones that check page call a special method instead ("AbY_C" instead of "AbY", etc). But I would much rather have an implicit method I'm just weird that way.

Also, I can't get to the NESICIDE homepage, and I really want to dl it and play around! Is there a different page I can get it at?

I think the 256 lookup table is how most do it...or the 256-case switch.

NESICIDE has been moved here. Right now I just hosted the downloads stuff...I haven't spent any time cleaning up the google site debris. You'll want to gather the CC65 snapshot from there also...and GNU Make if you need it...and one or two of the sample projects. *PLEASE* let me know [PM] if you have problems with any of it.

Thanks for the reminder I'll update my [www].