Does CPU register access show up on address bus?

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Does CPU register access show up on address bus?
by on (#75560)
Does access to the CPU I/O registers (e.g., APU registers or OAM DMA) show up on the address bus?

by on (#75561)
I am not a hardware whiz, but when you do the sprite DMA, It freezes the processor and then does the 512-514? clocks, so you wouldn't see that on the bus? But yeah all registers take up address spaces. (the bus?)


Hope that helps. I'm sure the hardware gods will come in here soon to help. :wink:

by on (#75564)
I'm not sure, but my guess is they do show up on the bus. Just seems like the most "natural" thing since it would require additional logic for them to not show up... OAM_DMA accesses themself of course show up since both RAM and PPU are external.
Re: Does CPU register access show up on address bus?
by on (#75577)
James wrote:
Does access to the CPU I/O registers (e.g., APU registers or OAM DMA) show up on the address bus?


Yes, they do show up. On the HardNES player I made ages ago, I mapped RAM under 4xxxh so that I could read back what was written to the registers. This worked fine.

The only caveat is on readback registers (4015) you will get the bits from 4015 instead of from the outside world. For the unimplemented bits of 4015 I am not sure what happens. They either come from the outside world or are set to a default level (0 or thereabouts).

Also it was brought up that 4018, 4019, and 401a are actually readable too and return the square volume and/or DPCM level somehow but I am not sure if it works. Q messaged me on IRC one day and said he thinks after studying the chips that this might happen.

Unfortunately my copyNES doesn't work any more due to a parallel port problem after I replaced the mobo on PC #2 so I have not checked yet.
Re: Does CPU register access show up on address bus?
by on (#75579)
kevtris wrote:
The only caveat is on readback registers (4015) you will get the bits from 4015 instead of from the outside world. For the unimplemented bits of 4015 I am not sure what happens. They either come from the outside world or are set to a default level (0 or thereabouts).

If $4015 is anything like $4016 and $4017 (and it might not be because those are the outside world), you get open bus on the unimplemented bits, which means the outside world comes through. I can't test this myself because open bus behaves differently with a PowerPak.

by on (#75580)
thanks guys!
Re: Does CPU register access show up on address bus?
by on (#75584)
tepples wrote:
kevtris wrote:
The only caveat is on readback registers (4015) you will get the bits from 4015 instead of from the outside world. For the unimplemented bits of 4015 I am not sure what happens. They either come from the outside world or are set to a default level (0 or thereabouts).

If $4015 is anything like $4016 and $4017 (and it might not be because those are the outside world), you get open bus on the unimplemented bits, which means the outside world comes through. I can't test this myself because open bus behaves differently with a PowerPak.


Yeah, 4016 and 4017 are different. They are external to the chip. 4015 is the only (known) register that is generated internally... unless 4018-401a allow reading. Those two 74HC368's on the NES board are what are used when 4016 and 4017 are read. There's two output signals that drive them from the CPU.