I ve seen that the opcodes for the same instruction, for example:
Share some resemblance to one another. In this case Zero page modes have a 6 as low byte, while Absolute modes share an E. And non-indexed modes have an E as high byte, while X-indexed ones have an F.
This pattern may just be because the 6502 designer just laid them this way, but it also may be that there's a definite bit pattern there, one that could allow us to make some bitwise comparisons to the opcode to find out the addressing mode and what action to perform, independently, rather than making large switches or jump tables.
Code:
// INC
INC_Zero_page_E6 = 0xE6,
INC_Zero_page_X_F6 = 0xF6,
INC_Absolute_EE = 0xEE,
INC_Absolute_X_FE = 0xFE,
INC_Zero_page_E6 = 0xE6,
INC_Zero_page_X_F6 = 0xF6,
INC_Absolute_EE = 0xEE,
INC_Absolute_X_FE = 0xFE,
Share some resemblance to one another. In this case Zero page modes have a 6 as low byte, while Absolute modes share an E. And non-indexed modes have an E as high byte, while X-indexed ones have an F.
This pattern may just be because the 6502 designer just laid them this way, but it also may be that there's a definite bit pattern there, one that could allow us to make some bitwise comparisons to the opcode to find out the addressing mode and what action to perform, independently, rather than making large switches or jump tables.