some issues about NES cpu

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some issues about NES cpu
by on (#45882)
Hello,
I have reading the 6502 bugs doc on your site and I have a few questions
about it.
I read that "the status bits pushed on the stack by PHP have the
breakpoint bit set", however, the 6502 emulator by Marat Fayzullin
seems to handle the situation so that the PLP instruction sets the B bit
when it pops the P register from the stack.
It is a little different, because if I write code like:

PHP
PLA

in the first case I should get an 1 in the breakpoint bit,
but in the second I get 0, and so for the 5th bit of the P register,
that should be always 1. So, what is the right way?

Moreover, I would like to know, in the official rockwell docs seems
that 2 CPU cycles must be added if branch occurs to different page
in instructions like BCS, BNE. What it means exactly? It refers
to a different page from the address the branch instruction is, or
it expects that the pc counter is already incremented (even if it needs
to be updated). The page crossing 1 cycle for instructions like AND (IND), Y
seems not to be handled by Marat code. Why?

All my questions refers specifically to NES cpu, not to 6502
in general.

Your help will be much appreciated,
Thanks,
tano

by on (#45885)
Branches:
2 cycles if a branch is not taken
3 cycles if it is taken
4 cycles if it is taken AND crosses pages

A branch crosses pages if address after the branch instruction and branch destination have different high bytes.

Yeah, I just added page crossing checks to branches in my emulator :)

by on (#45896)
For "address after the branch instruction" do you intend the
address of the relative offset of the branch (i.e. the next
one following the bne opcode), or the address of the next instruction
(i.e. that following offset, the opcode of the next instr., as I think)
Excuse me if I appear to be redundant, but I learn that,
speaking of low level things, it is important to be precise :-)
Bye,
tano

by on (#45901)
Status bits 4 and 5 doesn't even exist. Lots of docs say otherwise, unfortunately. The 6502 remembers only 6 status bits. When pushing them on the stack as a byte, the two extra bits are set to fixed values based on the cause of the push. Bit 5 is always set, and bit 4 is set for BRK and PHP, clear for an interrupt (IRQ/NMI).

by on (#45910)
Thanks!

by on (#45913)
example:

8FFF: BNE 9008
<-- this is the address after the branch instruction (9001)

9008:
<- this is the destination address

This example does not cross pages.

another example:

8FFC: BNE 9008
This one DOES cross pages since 8FFE and 9008 are on different pages.

by on (#45916)
Ok, now I have understood