So I spent last weekend getting a PPU working. I can now see some basics, but I still have a way to go. Much thanks to all you guys who have contributed so much solid information.
I am trying to figure out the proper behaviour for each PPU cycle of a visible scanline.
I checked the wiki and it has some very detailed information about sprite evaluation, but I am unclear as to how normal background rendered happens.
Here is what I have read:
- There are 341 PPU cycles per visible scanline (theres an anomaly on the 20th scanline, which I assume is the scanline BEFORE the visible scanlines start and only affects NTSC)
- Each pixel is 1 PPU cycle. So is this the first 256 cycles?
I assume yes based on the following conversation between Disch and Quietrust a long time ago:
0 based
PPU X address is incremented no earlier than every 3rd cycle on the scanline (3, 11, 19, etc)
PPU Y address is incremented on cycle 251
PPU X address is reset on cycle 257
I dont completely understand the "3" or why Y increments before X unless part of those cycles are in setting up a buffer of some sort.
Is there interleaving between background rendering, and sprite evaluation for the next scanline, or are both done (in some cases) on the same PPU cycle? (I assume yes)
I am a little confused by some of the wording on the wiki for sprite evaluation
http://www.nesdevwiki.org/wiki/NES_PPU# ... evaluation
It says:
Cycles 64-255: Sprite evaluation
On even cycles, data is read from (primary) OAM
On odd cycles, data is written to secondary OAM (unless writes are inhibited, in which case it will read the value in secondary OAM instead)
So by my math, there are 96 reads and 96 writes. ??? That number seems weird. There are 64 sprites max, there are 8 sprites (so 32 bytes) max per scanline. Is this a reflectection of both those numbers?
Also, I dont fully understand the state machine listed afterwards.
Are all the sprites evaluated each cycle for a partcular pixel? Maybe my problem is that the evaluations shouldnt be per pixel, but per tile.
Al
I am trying to figure out the proper behaviour for each PPU cycle of a visible scanline.
I checked the wiki and it has some very detailed information about sprite evaluation, but I am unclear as to how normal background rendered happens.
Here is what I have read:
- There are 341 PPU cycles per visible scanline (theres an anomaly on the 20th scanline, which I assume is the scanline BEFORE the visible scanlines start and only affects NTSC)
- Each pixel is 1 PPU cycle. So is this the first 256 cycles?
I assume yes based on the following conversation between Disch and Quietrust a long time ago:
0 based
PPU X address is incremented no earlier than every 3rd cycle on the scanline (3, 11, 19, etc)
PPU Y address is incremented on cycle 251
PPU X address is reset on cycle 257
I dont completely understand the "3" or why Y increments before X unless part of those cycles are in setting up a buffer of some sort.
Is there interleaving between background rendering, and sprite evaluation for the next scanline, or are both done (in some cases) on the same PPU cycle? (I assume yes)
I am a little confused by some of the wording on the wiki for sprite evaluation
http://www.nesdevwiki.org/wiki/NES_PPU# ... evaluation
It says:
Cycles 64-255: Sprite evaluation
On even cycles, data is read from (primary) OAM
On odd cycles, data is written to secondary OAM (unless writes are inhibited, in which case it will read the value in secondary OAM instead)
So by my math, there are 96 reads and 96 writes. ??? That number seems weird. There are 64 sprites max, there are 8 sprites (so 32 bytes) max per scanline. Is this a reflectection of both those numbers?
Also, I dont fully understand the state machine listed afterwards.
Are all the sprites evaluated each cycle for a partcular pixel? Maybe my problem is that the evaluations shouldnt be per pixel, but per tile.
Al