I sat down and traced out some Taito X1-005 carts to find what makes m80 and m207 different.
For m80 games, mirroring is controlled by writing to 7EF6. Only D0 is used: 0 = H and 1 = V (or maybe vice-versa, I forgot). I've seen in some docs stuff about bit 7 of 7EF0 and 7EF1 having something to do with mirroring but that is nonsense, they are used exclusively for CHR banking in this case. I've run into one game with a 256K CHR, so it needs all 8 bits to access all banks.
m207 on the other hand is wired slightly different. The pin that normally connects with CIRAM A10 in m80 is not connected on this board (so writing to 7EF6 does nothing). Instead, CIRAM A10 is controlled by the pin that normally controls CHR A17. This must be where the bit 7 idea originated from. So really, changing bit 7 in any of the CHR registers (F0-F5) will direct to CIRAM A10 (not just F0 & F1). This also limits this board to 128K CHR.
Also the X1-005 has 128 bytes of WRAM at 7F00 (mirrored at 7F80) which is enabled by writing $A3 to 7EF8. Any other value will disable it.
One last thing about the X1-005, registers 7EF6 - 7EFF are all mirrored to the next byte (eg. 7EF6 behaves the same as 7EF7, 7EF8 is the same as 7EF9, etc)
Pinout is at bottom of page. Haven't traced out the X1-017 yet (64 pins, ugh!)
While I was at it, I decided to take a closer look at the X1-017 WRAM setup as well. It's very odd, it has 5KB of internal WRAM split into 3 segments (2KB,2KB,1KB). Each segment can be individually be enabled and disabled.
The way you enable them is equally bizarre, you have to write a specific value to the control registers:
$7EF7: Write CAh to enable 2KB at $6000
$7EF8: Write 69h to enable 2KB at $6800
$7EF9: Write 84h to enable 1KB at $7000
Writing anything but the expected values will disable the segment.
There seems to be 3 unused registers ($7EFD/E/F). I thought maybe each controlled an additional 1K segment, which would make the total a normal 8K, but I wrote a little program to just try every value on each register and then return the value which made the segment writable, but nothing worked on these 3 regs.
For m80 games, mirroring is controlled by writing to 7EF6. Only D0 is used: 0 = H and 1 = V (or maybe vice-versa, I forgot). I've seen in some docs stuff about bit 7 of 7EF0 and 7EF1 having something to do with mirroring but that is nonsense, they are used exclusively for CHR banking in this case. I've run into one game with a 256K CHR, so it needs all 8 bits to access all banks.
m207 on the other hand is wired slightly different. The pin that normally connects with CIRAM A10 in m80 is not connected on this board (so writing to 7EF6 does nothing). Instead, CIRAM A10 is controlled by the pin that normally controls CHR A17. This must be where the bit 7 idea originated from. So really, changing bit 7 in any of the CHR registers (F0-F5) will direct to CIRAM A10 (not just F0 & F1). This also limits this board to 128K CHR.
Also the X1-005 has 128 bytes of WRAM at 7F00 (mirrored at 7F80) which is enabled by writing $A3 to 7EF8. Any other value will disable it.
One last thing about the X1-005, registers 7EF6 - 7EFF are all mirrored to the next byte (eg. 7EF6 behaves the same as 7EF7, 7EF8 is the same as 7EF9, etc)
Pinout is at bottom of page. Haven't traced out the X1-017 yet (64 pins, ugh!)
While I was at it, I decided to take a closer look at the X1-017 WRAM setup as well. It's very odd, it has 5KB of internal WRAM split into 3 segments (2KB,2KB,1KB). Each segment can be individually be enabled and disabled.
The way you enable them is equally bizarre, you have to write a specific value to the control registers:
$7EF7: Write CAh to enable 2KB at $6000
$7EF8: Write 69h to enable 2KB at $6800
$7EF9: Write 84h to enable 1KB at $7000
Writing anything but the expected values will disable the segment.
There seems to be 3 unused registers ($7EFD/E/F). I thought maybe each controlled an additional 1K segment, which would make the total a normal 8K, but I wrote a little program to just try every value on each register and then return the value which made the segment writable, but nothing worked on these 3 regs.
Code:
-----------------------
Pinout for Taito X1-005
-----------------------
(R) = connects to ROM only
(F) = connects to Famicom only
(B) = connects to both
-------
NC -|01 48|- VCC
(F) M2 -|02 47|- PRG A17 (R)
(B) PRG A12 -|03 46|- PRG A15 (R)
(F) PRG A13 -|04 45|- PRG A14 (R)
(F) PRG A14 -|05 44|- PRG A13 (R)
(B) PRG A6 -|06 43|- PRG A8 (B)
(B) PRG A5 -|07 T 42|- PRG A9 (B)
(B) PRG A4 -|08 A 41|- PRG A11 (B)
(B) PRG A3 -|09 I 40|- PRG A16 (R)
(B) PRG A2 -|10 T 39|- PRG A10 (B)
(B) PRG A1 -|11 O 38|- PRG /CE (B)
(B) PRG A0 -|12 37|- PRG D7 (B)
(B) PRG D0 -|13 X 36|- PRG D6 (B)
(B) PRG D1 -|14 1 35|- PRG D5 (B)
(B) PRG D2 -|15 - 34|- PRG D4 (B)
(F) PRG R/W -|16 0 33|- PRG D3 (B)
*(R) CHR A17 -|17 0 32|- NC
GND -|18 5 31|- CIRAM A10 (F)*
(R) CHR A15 -|19 30|- CHR A14 (R)
(R) CHR A12 -|20 29|- CHR A13 (R)
(F) CHR A10 -|21 28|- CHR A11 (R)
(F) CHR A11 -|22 27|- CHR A16 (R)
(F) CHR A12 -|23 26|- CHR A10 (R)
GND -|24 25|- NC
-------
*: This is the normal configuration for m80, for m207, pin 17 becomes
CIRAM A10 and pin 31 is NC
Pinout for Taito X1-005
-----------------------
(R) = connects to ROM only
(F) = connects to Famicom only
(B) = connects to both
-------
NC -|01 48|- VCC
(F) M2 -|02 47|- PRG A17 (R)
(B) PRG A12 -|03 46|- PRG A15 (R)
(F) PRG A13 -|04 45|- PRG A14 (R)
(F) PRG A14 -|05 44|- PRG A13 (R)
(B) PRG A6 -|06 43|- PRG A8 (B)
(B) PRG A5 -|07 T 42|- PRG A9 (B)
(B) PRG A4 -|08 A 41|- PRG A11 (B)
(B) PRG A3 -|09 I 40|- PRG A16 (R)
(B) PRG A2 -|10 T 39|- PRG A10 (B)
(B) PRG A1 -|11 O 38|- PRG /CE (B)
(B) PRG A0 -|12 37|- PRG D7 (B)
(B) PRG D0 -|13 X 36|- PRG D6 (B)
(B) PRG D1 -|14 1 35|- PRG D5 (B)
(B) PRG D2 -|15 - 34|- PRG D4 (B)
(F) PRG R/W -|16 0 33|- PRG D3 (B)
*(R) CHR A17 -|17 0 32|- NC
GND -|18 5 31|- CIRAM A10 (F)*
(R) CHR A15 -|19 30|- CHR A14 (R)
(R) CHR A12 -|20 29|- CHR A13 (R)
(F) CHR A10 -|21 28|- CHR A11 (R)
(F) CHR A11 -|22 27|- CHR A16 (R)
(F) CHR A12 -|23 26|- CHR A10 (R)
GND -|24 25|- NC
-------
*: This is the normal configuration for m80, for m207, pin 17 becomes
CIRAM A10 and pin 31 is NC