kyuusaku wrote:
tepples wrote:
Try 16 pointers, each referencing a 4 KB bank, for reads, and 16 pointers for writes.
With the large banks, how would you suggest I have byte precision for open bus/memory/io/ignore and bus conflict events?
For the CPU built-in I/O registers, set your $4000 handler to check if the write is in $4000-$4017 and use a separate pair of 24-entry tables for those.
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Why even 4KB banks?
NSF, for one. Crazy Japanese Famicom mappers, for another.
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Emulating the system at sluggishly low level similar to how I gather people are emulating the PPU, a state machine executing pseudo microinstructions for each cycle like the actual thing.
Some interrupts can be predicted far in advance. When one of those interrupts is about to occur, you might want to use a cycle-by-cycle engine for a few instructions until it does occur. It's just like the PPU, where you use a scanline engine for most scanlines and a cycle-by-cycle engine for "interesting" scanlines.
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I'm familiar with filters, sampling and DAC but envelopes, decay and arpeggio I'm pretty clueless about.
"Envelope" is the change in volume as a note is played on an instrument. This envelope generally falls into four segments: attack (rising), decay (falling), sustain (more or less constant), and release (falling to zero).
"Arpeggio" in the context of tracked music is rapid oscillation of one tone generator among two to four pitches to produce a warbly chord.
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My PC programs use the
Allegro library, which abstracts over DirectInput, DirectDraw, and DirectSound, and their equivalents on other platforms.
Thanks for the tip. I assume you prefer this to SDL; please tell me why. I have never used either.
I learned Allegro back when my PC ran MS-DOS and Windows 3.1. Allegro ran on DOS (and still DOeS); SDL does not. Allegro also implements slightly higher level functions (e.g. line, rectfill, and even basic GUI elements) out of the box.
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It would happen for example when a homebrew programmer indexes ROM with $2006 and writes to $2007.
Writes are just ignored, as long as rendering is turned off while this happens.
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There aren't any mappers with writable registers in PPU space--yet. I'm just interested in the behavior, I wondered if the PPU would crash and if so, if it could be recovered by turning the PPU off then on again etc.
Writes to $2007 while rendering is turned on appear to cause conflict on both the data and address buses.
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I know this but what if there was no CHR ROM, CHR RAM or VRAM? My theoretical emulator would emphasize arbitrary software/hardware design; not be bound to traditional commercial game emulation (iNES or even UNIF for a description.)
Arbitrary hardware? So are you willing to allow for things like Wide Boy, where you have a completely separate computer on an NES cart, with its own PPU that feeds a stream of pixels to the NES PPU, and the 6502 just sits there polling the controllers?