mattmatteh wrote:
i suppose i was referring to what happens when there is a change on reg 0.
Changing the mode simply changes how the CHR regs are applied. The behavior can be inferred from the page on the wiki.
Remember that no actual "swap" takes place... it's just the mapper replacing the high address bits with an internal register. The order the regs are written does not matter in the end... ultimately, it comes down to the contents of the registers.
At ANY time bit 4 of reg 0 is clear, reg 1 is used as the 8k page number, and at any time bit 4 of reg 0 is set, regs 1 and 2 will be used as the 4k page number.
In an emulator, if you use a "swap" style approach, you
will have to reswap everything on a reg 0 write if the mode changes. Many emus do this by having a "sync" function:
Code:
void Sync()
{
if(reg0 & 0x10) // 4k mode
{
SwapCHR_4k(0x0000,reg1);
SwapCHR_4k(0x1000,reg2);
}
else // 8k mode
SwapCHR_8k(0x0000,reg1 >> 1);
}
Then all Sync on every related reg write (in this case, regs 0-2)
Many mappers operate this way (MMC3 and MMC5 included). Mode changes often have an immediate effect and will need to have things reswapped using the contents of each register.