More scrolling/timing stuff

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More scrolling/timing stuff
by on (#1180)
My emu is coming along great ^^. Right now I'm focusing on games which are causing troubles. The two I'm focusing on right now are "Wolverine" and "Summer Carnival '92 - Recca". Both MMC3 games... and both suffering from the same problem.

I've been looking at Wolverine in particular. The status bar at the bottom of the screen shakes a bit. I've looked at its IRQ code and it times it to take exactly 452 cpu cycles (1356 ppu cycles) from the point the IRQ is tripped, to the point it flips the PPU on (writes $0E to $2001).

The way I'm handling things now:

MMC3 IRQs are tripped on scanline cycle 256
Vertical scroll counters are incremeted on cycle 252 (if Bg or spr on)

Since Wolverine uses exactly 1356 cycles... the earliest scanline cycle on which the screen can be flipped back on is:
(256 + 1356) % 341 = 248 (before the V scroll update)

This explains the shaking. When the IRQ occurs closer to cyc 256, the screen gets turned on before the VScroll update... making the status bar appear to be one line higher than it should. But when the IRQ occurs later, the PPU gets turned on after VScroll update.. letting the statusbar appear where it should. So some frames it appears sooner, some it appears normal -- causes the shaking.

Anyway... to test this out... I tried making IRQs take 9 cycles instead of 7 (pushing the earliest $2001 write time up to 254) which solves my Wolverine troubles (Recca troubles as well, which is why I think the games share the same problem). But I'm not going to go with this solution because it's obviously wrong =P... it just confirms my problem.

The thing I'm thinking now is that the IRQ isn't tripped on cycle 256, but on cycle 260 or 261. Which pushes the $2001 write time up to 252 or 253 (on or after V scroll update).

Another solution would be to bring the VScroll update sooner into the scanline... although I can't imagine it being sooner than 252.

I'm really leaning towards the first solution and making MMC3 IRQs trip on cycle 261 -- but I thought I'd see if I can get a second opinion from you guys. Do you guys know what cycle that IRQ is supposed to trip on? I can't imagine it being later than 261, but 256 makes a bit more sense.

Anyway, any help appreciated ^^.

by on (#1181)
MMC3 IRQs are triggered on the first rising edge of PPU A12 in a given scanline (it has a buffer of sorts to filter out rapid sequences), and the PPU does not access the sprite pattern table until cycle 260 - this would explain your timing problems.

(cycle 260 is when the PPU outputs and latches the address; cycle 261 is when the actual read takes place)

by on (#1182)
Awesome. I suspected as much after re-checking BT's doc (it says the first sprite pattern is fetched on memory access 131 -- cycle 260).

Anyway... just tried it out in my emu... and it seems to have worked ^^. Wolverine and Recca are both running great.

Thanks again Q

edit - seems like this is what is needed to make Kick Master's title screen work as well. Neato ^^