Hi all - yes, yet another beginner emu in progress.
I'm comparing my execution against FCEUX trace logs, so that I can be sure I don't have any bugs. I'm using the SMB1 NTSC rom. My problem is where the vblank flag changes (yes, this same old issue..)
I have all the cycle numbers, instruction numbers, registers, flags, and instruction opcode numbers matching the FCEUX trace logger output for the initial 6 instructions and the alternating LDA $2002/BPL $800A all the way up until a flag change happens.
I know vblank flag should be set at scanline 241 / dot 1. To me that first hits at total ppu dots in frame == 82181, and cpu tick 27394/instruction number 7828. I believe that one is skipped.
The next scanline 241/ dot 1 hits at the same ppu dots # in the frame, cpu tick 57174/instruction number 16337.
Therefore the trace log line of instruction 16339 is the first one where the A register changes to 90, e.g. the 0x80 flag is read in. That is my first log diff with FCEUX trace log.
In FCEUX's log, that doesn't happen until the line on cpu tick 59679 / instruction 17053 - so 714 instructions later.
I correctly have a total of 89342 dots per frame.
There's only a handful of instructions running up to that point and the cycle numbers/instruction numbers match, so there must be a bug somehow in the timing but I can't imagine what it would be given there's not much going on.
If anyone can check the math in their own project, I'd appreciate it - I have tried digging around other emulators to breakpoint where this would happen and look at the numbers, but I'm trying to stick with one I can compare trace logs with and I find FCEUX very hard to figure out the code for.
Thanks for your help..
-rel
I'm comparing my execution against FCEUX trace logs, so that I can be sure I don't have any bugs. I'm using the SMB1 NTSC rom. My problem is where the vblank flag changes (yes, this same old issue..)
I have all the cycle numbers, instruction numbers, registers, flags, and instruction opcode numbers matching the FCEUX trace logger output for the initial 6 instructions and the alternating LDA $2002/BPL $800A all the way up until a flag change happens.
I know vblank flag should be set at scanline 241 / dot 1. To me that first hits at total ppu dots in frame == 82181, and cpu tick 27394/instruction number 7828. I believe that one is skipped.
The next scanline 241/ dot 1 hits at the same ppu dots # in the frame, cpu tick 57174/instruction number 16337.
Therefore the trace log line of instruction 16339 is the first one where the A register changes to 90, e.g. the 0x80 flag is read in. That is my first log diff with FCEUX trace log.
In FCEUX's log, that doesn't happen until the line on cpu tick 59679 / instruction 17053 - so 714 instructions later.
I correctly have a total of 89342 dots per frame.
There's only a handful of instructions running up to that point and the cycle numbers/instruction numbers match, so there must be a bug somehow in the timing but I can't imagine what it would be given there's not much going on.
If anyone can check the math in their own project, I'd appreciate it - I have tried digging around other emulators to breakpoint where this would happen and look at the numbers, but I'm trying to stick with one I can compare trace logs with and I find FCEUX very hard to figure out the code for.
Thanks for your help..
-rel