The Wiki says:
Quote:
The MMC3 scanline counter is based entirely on PPU A12, triggered on rising edges (after the line remains low for two rising edges of M2).
Can somebody explain me what is "M2"?
Thxs
M2 is specifically the external CPU cycle signal.
It is not the master clock.
It is not the APU or DMA clocks.
It is not the PPU pixel or colorburst clock.
In the 2A03, it is high for 5/8 of the time and low for 3/8. The exact phase of it relative to the PPU is random, so the exact rise/fall time of M2 matters relative to PPU events.