UNIF UNL-SA-9602B - NESdev BBS

UNIF UNL-SA-9602B
by zeroone on 2017-02-05 (#188542)

I am attempting to understand how the UNIF UNL-SA-9602B mapper works by studying the code in FCEUX (sa-9602b.cpp). Here is the function that sets the PRG bank:

Code:

static void SA9602BPW(uint32 A, uint8 V) {
   setprg8r(EXPREGS[1], A, V & 0x3F);
   if (MMC3_cmd & 0x40)
      setprg8r(0, 0x8000, ~(1));
   else
      setprg8r(0, 0xc000, ~(1));
   setprg8r(0, 0xe000, ~(0));
}

In the setprg8r function, what does the first parameter mean? I noticed that when it's 0, it appears to refer to cartridge PRG ROM. A value of 0x10 is typically used for WRAM.

In unif.cpp, the mapper is marked with the following flag:

Code:

{ "SA-9602B", SA9602B_Init, BMCFLAG_32KCHRR },

...

else if (bmap[x].flags & BMCFLAG_32KCHRR)
               CHRRAMSize = 32;

The mapper appears to have 32K CHR RAM; however, no where in sa-9602b.cpp is a call to set the CHR RAM bank. I suspect that line in the code above where setprg8r takes EXPREGS[1] as an argument has something to do with it. Can anyone familiar with FCEUX's code base shed some light on this.

Re: UNIF UNL-SA-9602B
by lidnariq on 2017-02-05 (#188549)

zeroone wrote:

In the setprg8r function, what does the first parameter mean? I noticed that when it's 0, it appears to refer to cartridge PRG ROM. A value of 0x10 is typically used for WRAM.

The "memory number". Possibly inherited from UNIF (where there can be up to 16 PRG ROMs)? So numbers 0-15 are ROMs 0-15, and 16 is RAM.

Quote:

The mapper appears to have 32K CHR RAM; however, no where in sa-9602b.cpp is a call to set the CHR RAM bank.

The important lines you missed were

Code:

#include "mmc3.h"
[...]
        MMC3_CMDWrite(A, V);
[...]
        GenMMC3Power();
[...]
        GenMMC3_Init(info, 512, 0, 0, 0);
        pwrap = SA9602BPW;

This is an MMC3-class pirate/unlicensed mapper that selects between two (or four?) 512 KiB PRG ROM chips depending on values written to the CHR banks.

Re: UNIF UNL-SA-9602B
by zeroone on 2017-02-05 (#188556)

Thanks. You are correct. This mapper depends on three 512K PRG ROM chips. That first parameter refers to which of the 3 chips to access.

And, I did fail to notice that this is a pirate-MMC3 mapper that uses extra CHR RAM.

On a side note, this mapper also depends on the Subor Mouse for input. And, the FCEUX implementation of the mouse doesn't fully work for this game either (the mouse cursor only moves downwards).