You shouldn't give up =). This stuff is tricky and confusing at first, but once you get the hang of it it's a snap... and it's a great learning experience (not to mention I have loads of fun with it). If you stick with it... one day you'll be like "OOOOHhh! That's how it works" and everything will just all of the sudden snap into place.
One helpful thing I always try to do is get everything working in a common base. Having things running at all different rates (in Hz) is a pain in the arse to track... so it helps a whole lot to keep things in CPU cycles.
NTSC system has 179772.7272 cycles per second... knowing this... we can convert any other clock rate (in Hz) to CPU cycles with the following formula:
1789772.7272 / Rate_In_Hz = Rate_In_CPU_Cycles
So if the frame sequencer runs at ~240 Hz... then 1789772.7272 / 240 = ~7457.5. So you'd clock the frame sequencer once every 7457.5 CPU cycles
Now using a section of blargg's APU doc as a reference:
Code:
f = set interrupt flag
l = clock length counters and sweep units
e = clock envelopes and triangle's linear counter
mode 0: 4-step effective rate (approx)
---------------------------------------
- - - f 60 Hz
- l - l 120 Hz
e e e e 240 Hz
mode 1: 5-step effective rate (approx)
---------------------------------------
- - - - - (interrupt flag never set)
l - l - - 96 Hz
e e e e - 192 Hz
You'll keep a counter which tracks your 'step'. Every clock... you'll increase that step by one -- and wrap to zero if it reaches 4 or 5 (depending on the mode -- 4 or 5 step). When the step is 0... the sub-systems in the first column get clocked first. Assuming mode 0... this would be only 'e' (Square 1's Envelope/Decay Unit). When the step is 1... you clock both 'e' and 'l' (Square 1's Length Counter and Sweep Unit)
I hope that clears it up a bit.... don't worry about asking questions... I love this stuff so I don't mind helping any way I can. If you do decide to quit that's okay... but I think you should stick with it ;)