Really specific question about timing

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Really specific question about timing
by on (#11350)
According to what's been posted here previously, LoopyV is updated to point to the next horizontal tile on PPU clock cycle 3, 11, 19, and so on (zero based) of each scanline. OK, but does this take place *before* or *after* that cycle?

What I mean is, does it look like this:

Code:
Cycle #0: Latch address for name table byte
Cycle #1: Read name table byte into temporary buffer
Cycle #2: Latch address for attribute table byte
Cycle #3: Read attribute table byte
          Update Loopy_V
Cycle #4: Latch address for 1st pattern table data byte
Cycle #5: Read 1st pattern table data byte
(...)


Or would it be like this:

Code:
Cycle #0: Latch address for name table byte
Cycle #1: Read name table byte into temporary buffer
Cycle #2: Latch address for attribute table byte
Cycle #3: Update Loopy_V
          Read attribute table byte
Cycle #4: Latch address for 1st pattern table data byte
Cycle #5: Read 1st pattern table data byte
(...)


Or doesn't it matter to the system which order it is done in?