Mapper 092 is related to Mapper 072 as the wiki suggests, but it is not as simple as a different PRG setup. Per FCEUX:
Bits 4 and 5 are used to select the appropriate PRG or CHR bank. In addition, all lower 4 bits are used for both the PRG and CHR bank.
FCEUX's implementation maybe incomplete, but we should add this to the wiki.
Code:
//------------------ Map 092 ---------------------------
// Another two-in-one mapper, two Jaleco carts uses similar
// hardware, but with different wiring.
// Original code provided by LULU
// Additionally, PCB contains DSP extra sound chip, used for voice samples (unemulated)
static void M92Sync(void) {
uint8 reg = latche & 0xF0;
setprg16(0x8000, 0);
if (latche >= 0x9000) {
switch (reg) {
case 0xD0: setprg16(0xc000, latche & 15); break;
case 0xE0: setchr8(latche & 15); break;
}
} else {
switch (reg) {
case 0xB0: setprg16(0xc000, latche & 15); break;
case 0x70: setchr8(latche & 15); break;
}
}
}
void Mapper92_Init(CartInfo *info) {
Latch_Init(info, M92Sync, NULL, 0x80B0, 0x8000, 0xFFFF, 0);
}
// Another two-in-one mapper, two Jaleco carts uses similar
// hardware, but with different wiring.
// Original code provided by LULU
// Additionally, PCB contains DSP extra sound chip, used for voice samples (unemulated)
static void M92Sync(void) {
uint8 reg = latche & 0xF0;
setprg16(0x8000, 0);
if (latche >= 0x9000) {
switch (reg) {
case 0xD0: setprg16(0xc000, latche & 15); break;
case 0xE0: setchr8(latche & 15); break;
}
} else {
switch (reg) {
case 0xB0: setprg16(0xc000, latche & 15); break;
case 0x70: setchr8(latche & 15); break;
}
}
}
void Mapper92_Init(CartInfo *info) {
Latch_Init(info, M92Sync, NULL, 0x80B0, 0x8000, 0xFFFF, 0);
}
Bits 4 and 5 are used to select the appropriate PRG or CHR bank. In addition, all lower 4 bits are used for both the PRG and CHR bank.
FCEUX's implementation maybe incomplete, but we should add this to the wiki.