MMC3 and PPUADDR

This is an archive of a topic from NESdev BBS, taken in mid-October 2019 before a server upgrade.
View original topic
MMC3 and PPUADDR
by on (#139723)
The MMC3 emulator tests rely on PPUADDR modifying A12. But, I don't understand the connection. How are the loopy registers related to A12?
Re: MMC3 and PPUADDR
by on (#139724)
Ages ago... :) but still valid.
viewtopic.php?p=41196#p41196
Re: MMC3 and PPUADDR
by on (#139726)
During rendering:
PA12 is low during nametable fetch and equal to the appropriate bit of $2000 during tile fetch. This means it stays low during background fetch from the first pattern table ($0000). When sprite tiles are fetched from the second pattern table ($1000) during horizontal blanking, PA12 rises eight times normally , and these rises blur together from the MMC3 PIT's point of view.

During blanking:
PA12 is set equal to bit 12 of loopy_v during a read or write of video memory.