I'd like to ask for folks' opinion of having the PPU registers "table-ised". I recently saw this formatting being used in the
APU Frame Counter page and found it a lot easier to understand/visualise, plus it's a bit more compact.
Proposed new:
http://wiki.nesdev.com/w/index.php/User ... _.3E_writeOld:
http://wiki.nesdev.com/w/index.php/User ... 3E_write_2I don't want to change anything unless the majority of folks like the change. I can make this into a poll if that'd be preferred.
My old style was an imitation of
Firebug's mapper document, for what it's worth.
*nod* It's fine tepples, it's just that we should be consistent with our register formatting.
I happen to like the table-ised version more -- but as I got bit by the syntax highlighter incident, I'm not going to spend the time mass-modifying things only to have to revert it all later, so I'm asking in advance. :-)
I personally prefer preformatted text. It copies and pastes easier and it's easier to edit. I'm not a fan of the lines drawn using pipes, plus signs, and dashes, but I find something like this both easier to read and easier to work with.
Code:
Bit Function
--- ----------
0/1 Base nametable address
(0 = $2000; 1 = $2400; 2 = $2800; 3 = $2C00)
2 VRAM address increment per CPU read/write of PPUDATA
(0: add 1, going across; 1: add 32, going down)
3 Sprite pattern table address for 8x8 sprites
(0: $0000; 1: $1000; ignored in 8x16 mode)
4 Background pattern table address (0: $0000; 1: $1000)
5 Sprite size (0: 8x8; 1: 8x16)
6 PPU master/slave select
(0: read backdrop from EXT pins; 1: output color on EXT pins)
7 Generate an NMI at the start of the vertical blanking interval (0: off; 1: on)
Or something like
this.
Can I ask why you'd be copy-pasting stuff from the wiki to begin with? This sounds like an edge use case for something uncommon.
Also, bits are usually defined/documented in order of MSB to LSB (i.e. bit 7, bit 6, bit 5... bit 0). That's a pretty much "universal norm" in technical documentation. It all stems from most things being done left-to-right, and because of how "bit math" works (%00 = 0, %01 = 1, %10 = 2, %11 = 3, etc.) -- reversing that order isn't how computers work. Maybe Hebrew documentation is different? Dunno.
I don't know either. Was the
UART, which transmits LSB first, invented by Hebrew speakers? Were Hebrew speakers behind USB, which also transmits LSB first?
snarfblam wrote:
preformatted text [... is] easier to edit
Wat?
My personal favorite layout is Microchip's documentation of internal registers. But it's optimized for print, not a wiki, so I'm not certain how applicable it is.
koitsu wrote:
Can I ask why you'd be copy-pasting stuff from the wiki to begin with? This sounds like an edge use case for something uncommon.
Doesn't have to be the primary consideration, just a bonus with preformatted text. I'm also not particularly concerned about whether bits are listed greatest to least of vice-verse. That's not the point I was getting at.
lidnariq wrote:
Wat?
Text editor? Simple to use? No?
tepples wrote:
I don't know. Was the
UART, which transmits LSB first, invented by Hebrew speakers? Were Hebrew speakers behind USB, which also transmits LSB first?
Was x86 invented by hebrew speakers? How about VAX? What a ludicrous strawman. There are technical reasons for serial protocols to be little endian ... or big endian ... and that has nothing to do with the printed representation.
If I only had a brain...I guess the choice of explaining LSB first or explaining MSB first could depend on whether the LSB value controls the interpretation of MSB or the MSB value controls the interpretation of LSB.
Okay so now that the thread has gotten completely off-topic in the matter of like an hour, can we please re-focus on what I originally asked? :P All I've got so far is one person saying they'd prefer the preformatted/plaintext version.
I prefer the proposed new format.
EDIT: I guess I'll add a short description about "why": It's easier to connect a description to the corresponding bit (the bit number and its mask) in a single glance. YMMV.
I just asked in #nesdev on EFnet, and Lord_Nigh told me he prefers "Old"
http://git.redump.net/mame/tree/src/mess/drivers/cat.cScroll down around lines 717, 784, 843, 862
EDIT: More from #nesdev
<Movax21> I think the first is slightly easier to read. I don't hate the old one, but I think the new one is slightly better.
<Ulfalizer> i think i like the old one better. less spammy. might just be that i'm more used to it though. less line-following anyway
I prefer the old way, but mostly just because it's more consistent with most of the mapper pages. Frame counter is an oddball.
I do like labelling the various bits with letters though. Consider an alternative that's used on a lot of the mapper pages:
http://wiki.nesdev.com/w/index.php/VRC6_audioWhat I dislike most about the tables is all the lines between rows, and I just find the labelling of the rows a bit ugly, I suppose.
I think the PPU registers page could use a summary table like the main APU page. Maybe I'll
add one now...
I slightly prefer the new way, but I don't care much.
Since I had vouched for the "microchip style", I've mocked something up on
the wiki. Caveat: I don't think it's a good match, because (among other things) it's big, it requires coming up with a name for every single bit, and large portions are redundant on the NES in ways that they aren't on PICs.
When I said I prefer the old way, I think I mean that I prefer the way on the page I linked:
http://wiki.nesdev.com/w/index.php/VRC6_audioThe current PPU registers page is really hard to see which bits are which, but the similar style used on many mapper pages labels the bits with letters instead of just drawing lines straight out from bit numbers. It makes the structure of the register MUCH clearer.
So... I'd rather see that than tables. The monospaced font makes a nice regular grid of things, easy to read, not a lot of extraneous lines like you have on a table. If the PPU registers were diagrammed like that, I would much prefer that to tables.
What's currently there is terrible, you have to look hard to see what is in individual bits. It's not very at-a-glance readable.
I prefer any style that has a visual diagram, so both the old and new methods are fine by me.
With that being said, the new method is slightly clearer to me, due to the functions being visually defined as bitmasks to the byte, and has the ability to be rearranged without lines crossing or anything.
It doesn't need to be a table, it can be preformatted text:
Code:
7 bit 0
---- ----
NRZP SVBB
---- --BB Base nametable address
(0 = $2000; 1 = $2400; 2 = $2800; 3 = $2C00)
---- -V-- VRAM address increment per CPU read/write of PPUDATA
(0: add 1, going across; 1: add 32, going down)
---- S--- Sprite pattern table address for 8x8 sprites
(0: $0000; 1: $1000; ignored in 8x16 mode)
---P ---- Background pattern table address (0: $0000; 1: $1000)
--Z- ---- Sprite size (0: 8x8; 1: 8x16)
-R-- ---- PPU master/slave select
(0: read backdrop from EXT pins; 1: output color on EXT pins)
N--- ---- Generate an NMI at the start of the
vertical blanking interval (0: off; 1: on)
This would be a marriage of both styles.
Just saying I like both (fireburg's and table-like) alternatives equally well, so my vote doesn't go to any of these. I still like fireburg's style for it's compactness.
I however don't like particularly the Microchip style, because it is overcomplicated for no particularly more understandable result (why give cryptic names such as 'EXTOUTEN' for every single bit ? I was already opposing giving names to PPU registers, but I'd oppose even more naming all the bits !
Yeah, in looking at PSG chip documentation, microchip style is used a lot for describing registers, and although it makes sense, it's not the prettiest to look at, but it is condensed and allows a summary of all registers to fit on a single page. I prefer seeing bitmasks when each register is explained in detail though.
I stuck some letters on the diagrams that were there, I figure that's an improvement on what was already there, whether or not you want to make more drastic changes. It's only 3 registers we're talking about, anyway, not really much work to redo.
Bregalad wrote:
Just saying I like both (fireburg's and table-like) alternatives equally well, so my vote doesn't go to any of these. I still like fireburg's style for its compactness.
I however don't like particularly the Microchip style
Roughly what I think.
Thread has been locked. The overwhelming majority of users preferred the older non-table rendition, and thus it shall be kept. Thanks everyone for giving feedback!