Well after a few weeks of work, I managed to finish that FPGA SPC player I was working on and added a nice little user interface doo-dad. I posted a video of it if anyone wanted to see.
http://www.youtube.com/watch?v=maQffWS2_jQ
Everything's all original on it, I didn't reuse anyone's cores. They are all 100% verilog. There is a 6502 running a few minor parts of the visualization thing (the timer and it loads the scroller) but the rest is verilog.
I am hoping to make an FPGA SNES some time in the future and it needs sound, so that part is done
http://www.youtube.com/watch?v=maQffWS2_jQ
Everything's all original on it, I didn't reuse anyone's cores. They are all 100% verilog. There is a 6502 running a few minor parts of the visualization thing (the timer and it loads the scroller) but the rest is verilog.
I am hoping to make an FPGA SNES some time in the future and it needs sound, so that part is done