MAD-1 and MAD-2 info

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MAD-1 and MAD-2 info
by shadowkn55 on 2008-10-12 (#38426)
I decided to crack open my copy of Super Mario Kart (player's choice version) to see what the dsp looked like. I noticed it has a MAD-2 chip instead of the usual MAD-1 for most games I've seen. Does anyone know the difference between the two revisions? Is there any info out there that details the pinouts of either chips?

by tepples on 2008-10-12 (#38427)
Do you have a Pilotwings cart? What does it use?

(Super Mario Kart uses the same coprocessor as Pilotwings.)

by blargg on 2008-10-12 (#38431)
I've got Pilotwings open and it uses discrete logic. It has a 74HC04 (hex inverter?) and 74LS139 (dual 1-of-4 decoder?). I'm guessing the '139 is used the same way as in other carts, to decode the chip select for the ROM and DSP, and the '04 is used for the crystal oscillator that clocks the DSP.

I did some pinouts of the MAD-1 in a few carts recently. I'll have to dig up my findings. What in particular are you trying to figure out about them?

by shadowkn55 on 2008-10-12 (#38433)
I'm trying to figure out what pins 12 and 13 on MAD-1 do and how it affects the /OE outputs (pins 1, 4, and 16).

by tomaitheous on 2008-10-12 (#38441)
blargg wrote:
I've got Pilotwings open and it uses discrete logic. It has a 74HC04 (hex inverter?) and 74LS139 (dual 1-of-4 decoder?). I'm guessing the '139 is used the same way as in other carts, to decode the chip select for the ROM and DSP, and the '04 is used for the crystal oscillator that clocks the DSP.

I did some pinouts of the MAD-1 in a few carts recently. I'll have to dig up my findings. What in particular are you trying to figure out about them?


The '04 isn't used on the incoming address line before feeding to the '139?

by kyuusaku on 2008-10-12 (#38442)
1,4,16 are /CE outputs, not /OE. Pins 12 and 13 are used to decode those outputs. If anyone has an actual truth table of the signals, I'd appreciate it! If nobody has it, I'll make one pretty soon once I can desolder one.

by neviksti on 2008-10-13 (#38446)
kyuusaku wrote:
1,4,16 are /CE outputs, not /OE. Pins 12 and 13 are used to decode those outputs. If anyone has an actual truth table of the signals, I'd appreciate it! If nobody has it, I'll make one pretty soon once I can desolder one.

From some old notes...

EDIT: It didn't preserve the "formatting", but hopefully it is still readable.
EDIT(2): Some google searching, I found that there is an old copy here:
http://repyh.homestead.com/files/SNES_MemMap.txt

Please note that this is very old (I didn't even know that free webspace still existed), and was before the time that people agreed on what the cartridge edge connector pads were. I'd trust the "truth table", but just be wary of some of the labels I used on things.
EDIT(3): Wow, I just read through it. This must be way back from when I was first learning about the SNES. I was frustrated with all the weirdness people were saying about the memory map of the snes in the old docs, and decided to start there I guess. Reading it now is really weird as everything sounds so antiquainted.
Code:
------------------------------------------------
The MAD-1 chip (and it's usual connections)

pin#, connection
01 /HI <--- if two ROM chips, this selects the upper one
02 SRAM /CS
03 NC <--- could be used in HiRom mode to put a DSP/SRAM/whatever at ($00-$1F):(6000-7FFF)
04 ROM /OE
05 SRAM Vcc
06 Vcc
07 resistor to +3V of battery
08 GND

16 /LOW <--- if two ROM chips, this selects the lower one
15 A15 (LoRom), A13 (HiRom)
14 BA4 (LoRom), A14 (HiRom)
13 BA5
12 Vcc or BA6 (LoRom), A15 or BA6(HiRom)...
11 /CART (pad 49 on cartridge edge)
10 GND=LoRom, Vcc=HiRom
09 /RESET (pad 26 on cartridge edge)

------------------------------------------------
LoRom
pin 10 = low
         BA6
         or               ROM      SRAM   ROM   ROM
/RESET   /CART       Vcc   BA5   BA4   A15      /OE   ???   /CS   /HI   /LOW
pin9   pin11      pin12   pin13   pin14   pin15      pin4   pin3   pin2   pin1   pin16
0   0      x   x   x   x      1   1   1   1   1
0   1      x   x   x   x      1   1   1   1   1
1   0      0   0   0   0      1   1   1   1   1
         0   0   1   0      1   1   1   1   1
         0   1   0   0      1   1   1   1   1
         0   1   1   0      1   0   1   1   1
         1   0   0   0      1   1   1   1   1
         1   0   1   0      1   1   1   1   1
         1   1   0   0      1   1   1   1   1
         1   1   1   0      1   1   0   1   1
         x   0   x   1      0   1   1   1   0
         x   1   x   1      0   1   1   0   1
1   1      x   x   x   x      1   1   1   1   1


HiRom
pin 10 = high
         BA6
         or               ROM      SRAM   ROM   ROM
/RESET   /CART       A15   BA5   A14   A13      /OE   ???   /CS   /HI   /LOW
pin9   pin11      pin12   pin13   pin14   pin15      pin4   pin3   pin2   pin1   pin16
0   0      x   x   x   x      1   1   1   1   1
0   1      x   x   x   x      1   1   1   1   1
1   0      x   0   x   x      0   1   1   1   0
         x   1   x   x      0   1   1   0   1
1   1      0   0   0   0      1   1   1   1   1
         0   0   0   1      1   1   1   1   1
         0   0   1   0      1   1   1   1   1
         0   0   1   1      1   0   1   1   1
         0   1   0   0      1   1   1   1   1
         0   1   0   1      1   1   1   1   1
         0   1   1   0      1   1   1   1   1
         0   1   1   1      1   1   0   1   1
         1   x   x   x      1   1   1   1   1

------------------------------------------------

pin 09 - high (/RESET)
pin 10 - high (HiROM)
pin 11 - low  (/CART)

conclusion:
if pin13 = low,  then pin16 (/LOW) is enabled
   pin13 = high, then pin01 (/HI) is enabled

--------------------------------------------------------------

pin 09 - high (/RESET)
pin 10 - low  (LoROM)
pin 11 - low  (/CART)

conclusion:

pin15   pin14   pin13   pin12
0   0   1   1      /SRAM (pin03) - unused by any game I've seen
0   1   1   1      /SRAM (pin02)

               /ROM   /HI   /LOW
pin15   pin14   pin13   pin12      pin04   pin01   pin16
1   x   0   x      0   1   0
1   x   1   x      0   0   1


again, pin13 controls HI/LOW

================================================================================

HiRom

Connection scheme #1:
   A15,BA5,A14,A13
   low, hi, hi, hi   <- required to enable SRAM

   addresses that fit this:
   ($20-$3F):(6000-7FFF)
   ($60-$7F):(6000-7FFF)
   ($A0-$BF):(6000-7FFF)
   ($E0-$FF):(6000-7FFF)

Connection scheme #2:
   BA6,BA5,A14,A13
   low, hi, hi, hi   <- required to enable SRAM

   addresses that fit this:
   ($20-$3F):(6000-7FFF)
   ($20-$3F):(E000-FFFF)
   ($A0-$BF):(6000-7FFF)
   ($A0-$BF):(E000-FFFF)

After adding the remaining requirement:
RAM = high, /ROM = high
   SRAM addresses:
   ($20-$3F):(6000-7FFF)
   ($A0-$BF):(6000-7FFF)

So, the two connections schemes are the same...

---------------------------------------------------

LoRom

Connection scheme #1:
   Vcc,BA5,BA4,A15
    hi, hi, hi,low   <- required to enable SRAM

   addresses that fit this:
   ($30-$3F):(0000-7FFF)
   ($70-$7F):(0000-7FFF)
   ($B0-$BF):(0000-7FFF)
   ($F0-$FF):(0000-7FFF)

Connection scheme #2:
   BA6,BA5,BA4,A15
    hi, hi, hi,low   <- required to enable SRAM

   addresses that fit this:
   ($70-$7F):(0000-7FFF)
   ($F0-$FF):(0000-7FFF)

After adding the remaining requirement:
RAM = high, /ROM = low
   SRAM addresses:
   ($70-$7D):(0000-7FFF)
   ($F0-$FF):(0000-7FFF)

So, the two connections schemes are the same...

---------------------------------------------------