SNES LoROM mapping

I seem to be slightly confused. Just want some input.

So, normally, on a 65816 machine, you would complete access to the full 65kB space. Like if you wantes to load from the RAM at $012345 you would do LDA $012345.

The SNES is mapped. On the SNES, if you wanted the 1st bytes of a ROM you wouldn't access it at $000000, but at $008000, since RAM is at $000000.

So, in LoROM, the ROM chip is divided into $8000 chucks.

So, if you wanted the next chuck of ROM (bytes $8000-ffff of the ROM), would you set the bank byte to $01?

So for example, if you wanted to jump to that bank, would you...

JMP $018000

or if you wanted to read from the $8001th byte on the ROM, would you

LDA $018001

because it looks like you are trying to load the $18001th byte.

You can jump to a long address; some assemblers make you use jml rather than jmp though, or jsl rather than jsr.

You can also load from a long address, but yes, in that example setting data bank to $01 would be an option.

Always be careful moving the data bank around, because it will miserably screw up reading any hardware registers from bank $00.

My question is about the mapping.

Am I understanding it correctly?

LDA $018000 will load A from the byte located at $8000 in the ROM?

LDA $028000 from the $10000 th byte in the ROM?

So logically, the upper address bits are shifted...

00AAAAAA 1BBBBBBB BBBBBBBB
to
000AAAAA ABBBBBBB BBBBBBBB

right?

Edit, changed to As and Bs for clarity.

That is the "LoROM" = "mode $20" memory map, yes. Byte offset 0 in the ROM is available to the CPU at address $008000. Byte offset 0x8000 is available at $018000.

In contrast, the "HiROM" = "mode $21" memory map, byte offset 0x8000 is available to the CPU at address $008000, but byte offset 0 has to be accessed via some mirror because the CPU can't access ROM at $000000. Often $C00000 is used, to allow higher-speed bus timings.

What you’re saying is absolutely true for the mapping scheme commonly known as LoROM.

The SNES memory map can seem very confusing. What made it finally “click” with me was the realization that the SNES asserts the /ROMSEL pin on the cartridge connector for these address ranges:



In essence the SNES expects the cartridge to put something on the bus for these address ranges, while internal MMIO and RAM may have priority in other ranges. The peculiarities of all mapping schemes made a lot more sense then.

That said, any ranges not actually used by system MMIO or RAM are also usable on external buses, but I don’t think any official cartridges or peripherals do that.

HiROM games with RAM do...

Ah, of course. Actually, most expansion chip MMIO fall in these ranges, doesn’t it?

Still, the point stands, I think: /ROMSEL and /WRAMSEL behavior does explain why ROM is mapped the way it is.