CPU->Cart Address Mapping for ExLoROM/ExHiROM

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CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179257)
Hello all,

I'm trying to understand what the correct address bus mapping is for ExLoROM and ExHiROM.

From what I've pieced together from other posts and websites (e.g. here) this seems to be the ExHiROM memory mapping:
Code:
Bank    Address    Usage
00-3F   8000-FFFF   ROM P1 (MIRROR)
40-7F   0000-FFFF   ROM P1
80-BF   8000-FFFF   ROM P0 (MIRROR)
80-BF   6000-7FFF   RAM
C0-FF   0000-FFFF   ROM P0
So I'm thinking that the respective address bus mapping would be the following (where "==>" means "connects to"):
Code:
CPU_A0-CPU_A21 ==> CART_A0-CART_A21
CPU_A22 ==> No Connect
CPU_A23 ==> Cart ROM0/ROM1 Chip-Select (specifically A23==1 ? ROM0_Enable : ROM1_Enable)
My questions:

1) Is the above bus mapping correct and will it work for Tales of Phantasia, Dai Kaiju Monogatari 2, Super Demo World, and the Bad Apple demo? Those are the only 4 ROMs that I know about that actually use ExHiRom.

2) What mapping does Star Ocean use? I know it's not ExHiRom...I'm guessing its ExLoRom?

3) What is the bus mapping for ExLoRom? It's even harder to find information on ExLoRom. Does ExLoROM actually connect CPU_A15 or is it still left unconnected like normal LoRom?

4) Fullsnes.txt refers to a "BigLoROM" format. Is that synonymous with ExLoROM?

5) Fullsnes.txt states, "Some LoROM games are bigger than 2Mbytes (eg. Super Metroid, Gunple, Wizardry 6, Derby Stallion 3), these have bank 0-3Fh mapped in the 32K LoROM banks as usually, and bank 40h and up each mapped twice in the 64K hirom banks." Is that referring to ExLoRom or is that describing yet another different mapping? The largest a standard LoRom game can be is 2MB (right?) so I'm assuming that it must be describing ExLoRom, however, I can't find the term ExLoRom anywhere in fullsnes.txt.

6) Are there any games at all that actually use CPU_A22?

7) Are there any games that use all 24 bits of the CPU address bus? I'm assuming not since I haven't seen any ROMs bigger than 8MB (aside from the Star Ocean No-SDD-1 hack).

I hope that's not too many questions for one post but I think they are all inter-related.

Thanks so much.

Jonathon
Re: CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179258)
jwdonal wrote:
2) What mapping does Star Ocean use? I know it's not ExHiRom...I'm guessing its ExLoRom?
3) What is the bus mapping for ExLoRom? It's even harder to find information on ExLoRom. Does ExLoROM actually connect CPU_A15 or is it still left unconnected like normal LoRom?
ExLoROM doesn't actually exist. It's pirate nonsense to refer to a fictional 8MiB oversize LoROM board.

Much as HiROM ignores both A22 and A23, and ExHiROM ignores only A22 (and inverts A23),
LoROM ignores A15 (and A23), and so this fictional ExLoROM would ignore only A15.

Except that "HiROM" = Mode $21, "LoROM" = Mode $20, and "ExHiROM" = Mode $25. Nintendo never created such a thing specified equivalent to the concept of ExLoROM.

The Star Ocean hack to elide the S-DD1 isn't a formal memory map at all. It's just all 12 MiB of address space that /ROMSEL is asserted for.

Quote:
5) Fullsnes.txt states, "Some LoROM games are bigger than 2Mbytes (eg. Super Metroid, Gunple, Wizardry 6, Derby Stallion 3), these have bank 0-3Fh mapped in the 32K LoROM banks as usually, and bank 40h and up each mapped twice in the 64K hirom banks." Is that referring to ExLoRom or is that describing yet another different mapping? The largest a standard LoRom game can be is 2MB (right?) so I'm assuming that it must be describing ExLoRom, however, I can't find the term ExLoRom anywhere in fullsnes.txt.
That is the "ordinary" LoROM mapping. By which we mean "Mode 20h".

Quote:
6) Are there any games at all that actually use CPU_A22?
Well, the small handful of larger-than-2MiB Mode $20 games.


Incidentally, this terminology issue is part of why several people on the forum really hate the pirate terminology. It's just too vague, except when it's explicitly defined as exactly equivalent to one of Nintendo's defined memory layouts.

Even then, you can tell there's a constellation of almost-the-same-but-subtle-different memory layouts even within each Nintendo-official category.
Re: CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179261)
jwdonal wrote:
The largest a standard LoRom game can be is 2MB (right?)

No, the maximum size is 4 MiB for both LoROM (Mode 20h) and HiROM (Mode 21h).

lidnariq wrote:
The Star Ocean hack to elide the S-DD1 isn't a formal memory map at all. It's just all 12 MiB of address space that /ROMSEL is asserted for.

It's worth noting that the actual original game (without the hack) is 6 MiB, and lists itself as Mode 32h (that is, Mode 22h with fast ROM) in its header.
Re: CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179262)
Thanks for the super-speedy replies! :)
lidnariq wrote:
ExLoROM doesn't actually exist. It's pirate nonsense to refer to a fictional 8MiB oversize LoROM board.

Much as HiROM ignores both A22 and A23, and ExHiROM ignores only A22 (and inverts A23),
LoROM ignores A15 (and A23), and so this fictional ExLoROM would ignore only A15.

Except that "HiROM" = Mode $21, "LoROM" = Mode $20, and "ExHiROM" = Mode $25. Nintendo never created such a thing specified equivalent to the concept of ExLoROM.
Excellent info. That description of LoRom/ExLoRom and HiRom/ExHiRom is soooooo much clearer than anything else I found so far. So if I'm understanding you correctly that means that my bus mapping for ExHiRom is indeed correct. And it doesn't seem from what you've said or any other info that I've found so far that there are different "sub-versions/sub-types" of ExHiRom mapping format so it must be that Tales of Phantasia, Dai Kaiju Monogatari 2, Super Demo World, and the Bad Apple demo all use the bus mapping that I've described since they are all stated to be ExHiRom. So this also answers my question #1. Sweet!

lidnariq wrote:
The Star Ocean hack to elide the S-DD1 isn't a formal memory map at all. It's just all 12 MiB of address space that /ROMSEL is asserted for.
Okay, great info. Thanks!

lidnariq wrote:
That is the "ordinary" LoROM mapping. By which we mean "Mode 20h".
The first time I read that response I thought, "That can't be right." But then I re-read the fullsnes.txt description (a couple of times) and I realized that you're absolutely correct. I think it was the way fullsnes.txt was worded in regards to "mapped twice" that was confusing me, but I see what it's saying now - the "mapped twice" is just because of the unconnected CPU_A15 bit in LoRom.

lidnariq wrote:
Well, the small handful of larger-than-2MiB Mode $20 games.
Okay, yeah, that makes sense now based on both yours and Nicole's response.

lidnariq wrote:
Incidentally, this terminology issue is part of why several people on the forum really hate the pirate terminology.
Agreed. It's confusing. And I think I'm evidence for that. ;)

Nicole wrote:
No, the maximum size is 4 MiB for both LoROM (Mode 20h) and HiROM (Mode 21h).
Okay, now that I've looked at the high-level memory map again that makes total sense. The full CPU address bus is 24 bits (max 16MB) and both LoRom and HiRom ignore exactly 2 (albeit different) bits of the CPU address bus. So that means the max possible for both of them is 2^(24-2) = 4MB. Thanks for the correction!
Re: CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179267)
Here's the official Mode 25 memory map, from which you can probably discern necessary addressing lines on carts. The only EPROM development PCB (not cartridge/release PCB!) I know of which supported this is SHVC-8VP5B (supporting 4mbit to 64mbit size, incl. battery-backed SRAM).

The diagram in the bottom right is a little hard to comprehend; I can try to explain it if need be, but it's just a visual representation of what's denoted in Note 4.

I believe Note 3's "null area" is referring to the "reserved area" depicted in the main memory map.

Mode 35 (in the SNES ROM header, i.e. $FFD5), BTW, is Mode 25 with the CPU clock at 3.58MHz (i.e. effectively the same difference as mode 30/31 vs. mode 20/21).

Edit: link to PCB itself.
Re: CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179268)
Ah thanks, that's very useful too!
Re: CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179269)
I can't help you with the technical stuff, but I do know of one more rom that uses ExLoRom. That would be the hack Zelda 3 IQ Test, http://www.romhacking.net/hacks/2575/.
Re: CPU->Cart Address Mapping for ExLoROM/ExHiROM
by on (#179290)
suFami wrote:
I can't help you with the technical stuff, but I do know of one more rom that uses ExLoRom. That would be the hack Zelda 3 IQ Test, http://www.romhacking.net/hacks/2575/.


There's a name that rings a bell. That's the hack distributed as an xdelta patch that turns an uncompressed ROM into a deliberately corrupted ZIP file designed only to be openable by SNES9x or ZSNES (both of which handle ZIP files by simply searching for the largest file in the archive, ignoring filenames and directory structure)