BSS and non BSS segments importance

Okay, I don't really know, but I think tepples told me the point of the BSS segment and the segments outside of the BSS segment. You see, I'm trying to add in more tables in ram to my code, but it spits out an error that says that it cannot fit into the BSS segment and it refuses to assemble anything, so I move enough of the tables out of the BSS segment and into either the BSS7E or the BSS7F segments and it doesn't throw the error, although I haven't tested the files to see if it works. Isn't there some reason why it is good to try to fit everything in the BSS segment? I'm probably just crazy, but I think I remember hearing that the y register cannot index anything outside of the BSS segment, but that x can. Is this true?

True, there's no al,Y (absolute long indexed by Y) addressing mode to parallel al,X (absolute long indexed by X). But the Y register can still index into banks $7E and $7F if you do any of these:

1. Set the data bank register to $7E or $7F and use the a,Y (absolute indexed by Y) mode.
2. Set the data bank register to $7E or $7F and use the (d),Y (direct page indirect indexed by Y) or (d,S),Y (stack relative indirect indexed by Y) mode.
3. Use the (d),Y (direct page indirect long indexed by Y) mode.

One trick to setting the data bank is one PEA instruction to push to bank numbers, then PLB, do something, and PLB again. For example:

Or if you prefer to keep B=K (data bank matching program bank) most of the time, you can use this:

That's unfortunate.


So if I do that, it won't really make a difference? Basically, what I'm seeing is that you should try to avoid using y, but if you have to, you do that and it works just fine, because the assembler will automatically pick the right addressing mode. I'm guessing that there is no way for it to be able to know to throw an error if you are trying to address something outside of the BSS segment with Y, because it would have to be emulating the cpu to know if you did the PEA and PLB stuff?

This is incredibly random, but I remember hearing about the 65CE02 and how it has a Z register and I wonder, how did they differentiate STZ (store zero), from STZ (store in Z register)?

The 65CE02 had no "store zero" instructions.

(The entire instruction set is listed here, if you're curious)

Does the plain 6502 have one?

Nope.

Somewhat snarkily, the unintended unofficial opcodes sometimes count. (SYA=$9C, SXA=$9E, AHX=$93 and $9F)