ccovell wrote:
Well, if INC/DEC affected the carry, it would probably take more cycles (not good). Also, you might want to INC/DEC X or Y in between memory-indexed additions with the Accumulator, so different flag behaviour between INC A and INC X would be kinda weird.
Incrementing an index not wanting to affect carry makes sense. That's a good thought, thanks.
I doubt a carry flag would have taken any more cycles. Stuff like that can usually be done in parallel. ADC immediate is only 2 cycles and affects 7 different flags, I'm sure INX/INY could have had managed the carry flag in 2 cycles, if they wanted it to.
Espozo wrote:
For all the clc and sec's adding extra cycles throughout the code, it would probably have been faster to have gotten rid of the carry flag and just made it to where you had to do some sort of crazy maneuver for 32 bit instructions. It would have been awesome if there was a way to turn it off.
You really would need the dedicated ADD/SUB instructions I suggested. The problem is that if you can't fold the carry in with the addition like in ADC, the only way to apply the carry is to do another ADD based on a branch. With 2-digit adds this is bad, with 3 it's really bad. For every carry you add, you have to check if there's another carry, all the way to the end of the line. Here's 2 and 3-digit adds as if we had ADD (SEC+ADC) instead of ADC:
Code:
; a1:a0 += b1:b0
add2:
lda a0
add b0
sta a0
lda a1
bcc @digit1
; apply carry to a1
add #1
@digit1:
add b1
sta a1
rts
; a2:a1:a0 += b2:b1:b0
add3:
lda a0
add b0
sta a0
lda a1
bcc @digit1
; apply carry to a1
add #1
sta a1
bcc @digit1
; carry add caused another carry, apply to a2
lda a2
add #1
sta a2
lda a1
@digit1:
adc b1
sta a1
bcc @digit2
; apply carry to a2
lda a2
add #1
@digit2:
add b2
sta a2
rts
If you think about the 6502 being 8-bit, and you consider how often you need to deal with multi-digit numbers, you should be able to see why it's more useful to have ADC/SBC than ADD/SUB (if you're forced to choose). On 16 bit architecture, especially in games, there's a lot less need for multi-digit numbers (256x less, probably?) and on 32 bit architectures you hardly ever need them, but on the 6502 it was pretty essential to make that case reasonable.
Maybe the sad part is that dedicated ADD/SUB instructions would have been able to do the implicit CLC/SEC without adding the extra 2 cycles or 1 byte of code, just like CMP is able to.
But... I can dream about a better 6502 all day. I'm stuck with the one I've already got.