Hi all! I have a question about how Mesen handles NMI interrupts. I tried to search on this forum without any success, so I decided to write my first post here
I'm developing my first NES emulator using javascript, and I'm comparing Donkey Kong tracelogs from Mesen with the ones generated from my emulator.
Here's what I've got from Mesen when the first NMI happens:
...
86944 F4EF A:00 X:00 Y:00 P:IZ SP:FD CYC:338 SL:240
86946 F4F1 A:00 X:00 Y:00 P:IZ SP:FD CYC:3 SL:241
[NMI - Cycle: 86955]
86956 C85F A:00 X:00 Y:00 P:IZ SP:FA CYC:33 SL:241
86959 C860 A:00 X:00 Y:00 P:IZ SP:F9 CYC:42 SL:241
86962 C862 A:90 X:00 Y:00 P:NI SP:F9 CYC:51 SL:241
...
My assumption is that a single line is referred to an instruction BEFORE its execution, so my question is:
why the NMI is handled after F4F1 (STA, Zero page, 3 cycles) if this instruction is executed when the vBlank (and so the NMI) is already started (241/3)?
And in any case why there is this delay of 9 cycles between the F4F1 instruction (which happens at CPU cycle 86946) and the NMI (which happens at CPU cycle 86955) even if this STA should last 3 cycles?
Thanks in advance for your help
-Marco
I'm developing my first NES emulator using javascript, and I'm comparing Donkey Kong tracelogs from Mesen with the ones generated from my emulator.
Here's what I've got from Mesen when the first NMI happens:
...
86944 F4EF A:00 X:00 Y:00 P:IZ SP:FD CYC:338 SL:240
86946 F4F1 A:00 X:00 Y:00 P:IZ SP:FD CYC:3 SL:241
[NMI - Cycle: 86955]
86956 C85F A:00 X:00 Y:00 P:IZ SP:FA CYC:33 SL:241
86959 C860 A:00 X:00 Y:00 P:IZ SP:F9 CYC:42 SL:241
86962 C862 A:90 X:00 Y:00 P:NI SP:F9 CYC:51 SL:241
...
My assumption is that a single line is referred to an instruction BEFORE its execution, so my question is:
why the NMI is handled after F4F1 (STA, Zero page, 3 cycles) if this instruction is executed when the vBlank (and so the NMI) is already started (241/3)?
And in any case why there is this delay of 9 cycles between the F4F1 instruction (which happens at CPU cycle 86946) and the NMI (which happens at CPU cycle 86955) even if this STA should last 3 cycles?
Thanks in advance for your help
-Marco