infiniteneslives wrote:
Perhaps a counter implemented flash rom. But in this case it's doubtful the emu would even support flash rom emulation.
FCEUX grew support for the SST39xxx Flash protocol with the UNROM512 board (see rev3071). It uses FCEUX's PRG RAM abstraction, basically copying the .NES to conceptual RAM on initial load, and then just using the copy in "RAM" thereafter.
They even implemented the "erase chip" command, because why not.
Quote:
not going as far as to emulate accurate the random nature of sector erase and byte program times.
Given that the SST39xxx ABI is already implemented in FCEUX, adding pedantic timing requirements to it would be easy. Especially since the SST39xxx parts have ≈constant programming time.
Really, the entire calculus here just comes down to
- How much effort you want to put in
- How high priority of a target the game is for someone to get working in an emulator
- How much time you want to buy between public release of your hardware and emulation
Once it's mostly emulated, any edge cases will be fixed proportionate to how often they're encountered and their severity.